Results 31 to 40 of about 33,314 (300)

An Interleaved Buck-Boost-Zeta Converter With Coupled Inductor Multiplier Cell and Zero Input Current Ripple for High Step-Up Applications

open access: yesIEEE Access
An interleaved Buck-Boost-Zeta converter with the coupled inductor multiplier cell and zero input current ripple is proposed in this paper, which is suitable for high step-up applications such as the photovoltaic generation system.
Ying He, Liang Chen, Xuanjin Sun
doaj   +1 more source

A Family of Scalable Non-Isolated Interleaved DC-DC Boost Converters With Voltage Multiplier Cells

open access: yesIEEE Access, 2019
In this paper, a family of non-isolated interleaved high-voltage-gain DC-DC converters is presented. This family can be used in a wide variety of applications, such as in a photovoltaic systems interface to a high voltage DC distribution bus in a ...
Ahmad Alzahrani   +2 more
doaj   +1 more source

A new interleaved ultra‐large gain converter for sustainable energy systems

open access: yesIET Power Electronics, 2021
By inserting the secondary windings of the coupled inductors in series with the primary of the built‐in transformer at the middle branch, a new concept is introduced for achieving ultra large voltage gain. The secondary and tertiary windings of the built‐
Tohid Nouri, Mahdi Shaneh
doaj   +1 more source

Dynamics and control of voltage multiplier cells integrated boost converter

open access: yesIET Circuits, Devices & Systems, 2017
This paper presents a reduced order sliding mode controller based on hysteresis modulation for a boost converter with single voltage multiplier cell (VMC) operating in continuous conduction mode. Although VMC integrated boost converter improves the static gain without extreme duty cycle, it increases the number of components which in turn increases the
Palaveashem Mangaiyarkarasi   +1 more
openaire   +1 more source

A ZVT Auxiliary Circuit for High Step-Up Multi-Input Converters with Diode-Capacitor Multiplier

open access: yesMajlesi Journal of Electrical Engineering
In this paper, a Zero-Voltage Transition (ZVT) non-isolated high step-up multi-input DC-DC converters is proposed which employs an auxiliary cell and diode-capacitor multiplier.
Sayed Hossein Mirlohi   +2 more
doaj   +1 more source

Design of a three level boost converter for fuel cell applications [PDF]

open access: yesE3S Web of Conferences
This paper presents a simple 3 level DC-DC boost converter for fuel cell applications to boost voltage from 48 V DC to 210 V DC. The main advantages of this converter are its simple design, presence of a single switching element for easy controllability,
Sahoo Girija Shankar   +3 more
doaj   +1 more source

A high step‐up interleaved boost‐Cuk converter with integrated magnetic coupled inductors

open access: yesIET Renewable Power Generation, 2022
This paper proposes a high step‐up interleaved boost‐Cuk converter with integrated magnetic coupled inductor that is suitable for photovoltaic systems.
Desheng Rong, Xuanjin Sun, Ning Wang
doaj   +1 more source

Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics [PDF]

open access: yes, 2002
A bio-inspired model for an analog parallel array processor (APAP), based on studies on the vertebrate retina, permits the realization of complex spatio-temporal dynamics in VLSI.
Carmona Galán, Ricardo   +4 more
core   +1 more source

A Voltage Multiplier for the nEDM Experiment [PDF]

open access: yes, 2016
The nEDM experiment at Oak Ridge National Laboratory is a search for the electric dipole moment of the neutron (nEDM) at the 10-28 level. The experiment is currently in the research and development phase.
Bouman, Nathaniel I
core   +1 more source

A Low Noise Sub-Sampling PLL in Which Divider Noise Is Eliminated and PD-CP Noise Is not multiplied by N^2 [PDF]

open access: yes, 2009
This paper presents a 2.2-GHz low jitter sub-sampling based PLL. It uses a phase-detector/charge-pump (PD/CP)that sub-samples the VCO output with the reference clock. In contrast to what happens in a classical PLL, the PD/CP noise is not multiplied by N2
Bohsali, Mounhir   +3 more
core   +3 more sources

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