Results 151 to 160 of about 1,324 (178)

CPCA: An efficient wireless routing algorithm in WiNoC for cross path congestion awareness

The Integration VLSI Journal, 2019
Abstract Wireless network-on-chip (WiNoC) is a new paradigm to mitigate the long-distance transmission latency for conventional wired network-on-chip. The wireless routers in WiNoC have to handle a large number of packets which could cause data congestion, thus reducing the network performance.
Jianhua Li, Chenglong Sun, Huaguo Liang
exaly   +3 more sources

A Closed Loop Control based Power Manager for WiNoC Architectures

Proceedings of International Workshop on Manycore Embedded Systems, 2014
In modern CMOS technologies, the integration density continues to increase while limitations due to the wires interconnect become a bottleneck especially in multi-hop intra-chip communications. Emerging architectures, such as Wireless Networks-on-Chip (WiNoC), represent the candidate solutions to deal with communication latency issues which affect the ...
Muhammad Nadzir Marsono
exaly   +5 more sources

A-WiNoC: Adaptive Wireless Network-on-Chip Architecture for Chip Multiprocessors

IEEE Transactions on Parallel and Distributed Systems, 2015
With the rise of chip multiprocessors, an energy-efficient communication fabric is required to satisfy the data rate requirements of future multi-core systems. The Network-on-Chip (NoC) paradigm is fast becoming the standard communication infrastructure to provide scalable inter-core communication.
Savas Kaya, Soumyasanta Laha, David W Matolak   +2 more
exaly   +4 more sources

Study of Adaptative V-Band Channels Allowing Broadcast and Point to Point Communications in the WiNoC Concept

2025 19th European Conference on Antennas and Propagation (EuCAP)
This paper proposes to design V-band adaptive channels for wireless network-on-chip (WiNoC) communications. The aim is to optimize point-to-point or broadcast communications, considering a parallel plate propagation medium.
Bryan Treguer, Thierry Le Gouguec, Rozenn Allanic, Pierre-Marie Martin, Cédric Quendo   +4 more
exaly   +3 more sources

Integrated dipole antennas and propagation channel on silicon in Ka band for WiNoC applications

2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI), 2018
This paper presents an implementation of the transmission channel for tireless interconnect Network-on-Chip (WiNoC) applications in the context of BBC (on-chip wireless Broadcast-Based parallel Computing) project. First, the advantages of the WiNoC for intra-chip communications and particularly our application are presented.
Ihsan El Masri, Rozenn Allanic
exaly   +3 more sources

A Closed Loop Transmitting Power Self-Calibration Scheme for Energy Efficient WiNoC Architectures

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, 2015
In a wireless Network-on-Chip (WiNoC) the radio transceiver accounts for a significant fraction of the total communication energy. Recently, a configurable transceiver architecture able to regulate its transmitting power based on the location of the destination node has been proposed.
Muhammad Nadzir Marsono
exaly   +4 more sources

Dynamic detection of wireless interface faults and fault-tolerant routing algorithm in WiNoC

The Integration VLSI Journal, 2023
Dongyu Xu, Wu Zhou, Huaguo Liang
exaly   +3 more sources

Testing WiNoC-Enabled Multicore Chips with BIST for Wireless Interconnects

2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2018
Complex multicore Systems-on-Chips (SoCs) require large testing time and consume high amounts of power during post manufacturing test. With the advent of Network-on-Chip (NoC) based interconnections, the NoC has been envisioned to be reused as the Test ...
Abhishek Vashist, Amlan Ganguly, Mark Indovina   +2 more
openaire   +2 more sources

THCA: Three-Hop Congestion Awareness Routing Mechanism in WiNoC

Journal of Circuits, Systems and Computers
Wireless on-chip networks suffer from serious congestion problems due to the expansion of their network size and the joining of wireless nodes, and token passing is very inefficient in the case of low network injection. Aiming at the congestion problem and the inefficiency of token passing in wireless on-chip networks, this paper designs a three-hop ...
Dongyu Xu, Tianbao Zhang, Wu Zhou
openaire   +2 more sources

Design of a Wireless Router with Virtual Channel Fault Tolerant in WiNoC

Journal of Circuits, Systems and Computers, 2019
Due to chip manufacturing process defects and other factors, the virtual channel permanent fault may occur at the wireless interface in the WiNoC. This fault will affect the operating efficiency of the wireless router and degrade the network performance of the chip.
Yiming Ouyang, Wu Zhou, Sheng Li, Zhilu Wang, Huaguo Liang, Gaoming Du   +5 more
openaire   +2 more sources