Results 41 to 50 of about 1,324 (178)
Le sacramentaire de l'abbé Manassès de Bergues-Saint-Winoc
N. Huyghebaert
openaire +3 more sources
Systems-on-chips need numerous predesigned cores to advance. NoC enables Multi-Core SoCs (MC_SoCs). Conventional NoC cores use power and latency on multi-hop wired connections.
Dinesh Kumar T.R., Karthikeyan A.
doaj +1 more source
Abstract A cruise observation of atmospheric aerosols and gaseous air/seawater compounds was performed in the western North Pacific during the spring pre‐bloom period. The aerosol size distribution and cloud condensation nuclei (CCN) activity were characterized according to the source type: terrestrial/pollution, marine, and mixed. The CCN activity was
Kaori Kawana +10 more
wiley +1 more source
A Hybrid Selection Strategy Based on Traffic Analysis for Improving Performance in Networks on Chip
Networks on chip (NoCs) are an idea for implementing multiprocessor systems that have been able to handle the communication between processing cores, inspired by computer networks. Efficient nonstop routing is one of the most significant applications of NOC.
Mohammad Trik +4 more
wiley +1 more source
Multicriteria Deming Regressive African Buffalo Optimized Mapping for 3D NoC Architecture Design
Purpose. Networks‐on‐Chip (NoC) is a network‐based communication between operating cores and intellectual property (IP) cores integrated on the same chip. An efficient design of NoC ensures high‐speed data transfer and minimum essential connections in large‐scale multicore, low power applications. Design/methodology/approach.
Sushma G +4 more
wiley +1 more source
A Novel Low-Latency Regional Fault-Aware Fault-Tolerant Routing Algorithm for Wireless NoC
WiNoC has become a promising on-chip interconnect architecture. Due to the integration and manufacturing limits of wireless interconnects in nanotechnology, WiNoC systems are more susceptible to high failure rates. In this paper, we propose a novel fault-
Yiming Ouyang +4 more
doaj +1 more source
Analytical Model for Performance Evaluation of Token-Passing-Based WiNoCs
Recent advances in technology integration have introduced new on-chip interconnects, such as wireless Network-on- Chips (NoCs), making the design space too large to be efficiently explored with time-consuming standard simulators. In this paper, we propose an analytical model based on queuing theory to evaluate the latency of manycore architecture ...
Krayem, Ibrahim +3 more
openaire +3 more sources
Mapping of Deep Neural Network Accelerators on Wireless Multistage Interconnection NoCs
In the last few decades, the concept of Wireless Network-on-chip (WiNoC) has emerged as a promising alternative for Multiprocessor Systems on Chip (MPSOC) to achieve reliable and scalable communication. Worth recalling in this regard is that our research
Yassine Aydi +3 more
doaj +1 more source
Design of a Wideband Antenna for Wireless Network-On-Chip in Multimedia Applications
To allow fast communication—at several Gb/s—of multimedia content among processors and memories in a multi-processor system-on-chip, a new approach is emerging in literature: Wireless Network-on-Chip (WiNoC).
Fernando Gutierrez
doaj +1 more source
A resilient 2-D waveguide communication fabric for hybrid wired-wireless NoC design [PDF]
Hybrid wired-wireless Network-on-Chip (WiNoC) has emerged as an alternative solution to the poor scalability and performance issues of conventional wireline NoC design for future System-on-Chip (SoC). Existing feasible wireless solution for WiNoCs in the
Ahmadinia, Ali +5 more
core +1 more source

