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A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms
ACM Computing Surveys, 2023Recent trends in deep learning (DL) have made hardware accelerators essential for various high-performance computing (HPC) applications, including image classification, computer vision, and speech recognition.
C. Silvano +21 more
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A Survey of Design and Optimization for Systolic Array-based DNN Accelerators
ACM Computing Surveys, 2023In recent years, it has been witnessed that the systolic array is a successful architecture for DNN hardware accelerators. However, the design of systolic arrays also encountered many challenges.
Rui Xu, Sheng Ma, Yang Guo, Dongsheng Li
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GAMMA: Automating the HW Mapping of DNN Models on Accelerators via Genetic Algorithm
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2020DNN layers are multi-dimensional loops that can be ordered, tiled, and scheduled in myriad ways across space and time on DNN accelerators. Each of these choices is called a mapping.
Sheng-Chun Kao, T. Krishna
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Digital Versus Analog Artificial Intelligence Accelerators: Advances, trends, and emerging designs
IEEE Solid-State Circuits Magazine, 2022For state-of-the-art artificial intelligence (AI) accelerators, there have been large advances in both all-digital and analog/mixed-signal circuit-based designs.
J.-s. Seo +8 more
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ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators
IEEE transactions on computers, 2021Building efficient embedded deep learning systems requires a tight co-design between DNN algorithms, hardware, and algorithm-to-hardware mapping, a.k.a. dataflow.
L. Mei +4 more
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International Electron Devices Meeting, 2019
DNN+NeuroSim is an integrated framework to benchmark compute-in-memory (CIM) accelerators for deep neural networks, with hierarchical design options from device-level, to circuit-level and up to algorithm-level. A python wrapper is developed to interface
Xiaochen Peng +4 more
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DNN+NeuroSim is an integrated framework to benchmark compute-in-memory (CIM) accelerators for deep neural networks, with hierarchical design options from device-level, to circuit-level and up to algorithm-level. A python wrapper is developed to interface
Xiaochen Peng +4 more
semanticscholar +1 more source
SSRN Electronic Journal, 2004 zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Hausmann, Ricardo +2 more
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How Do Accelerators Impact the Performance of High-Technology Ventures?
Management Sciences, 2020Accelerators aim to help nascent companies increase the likelihood of funding and successful outcomes by providing capital, enabling connections to industry experts, and increasing exposure to investors.
Sandy Yu
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Accelerating virtualization of accelerators
2021The use of specialized accelerators is among the most promising paths to better energy efficiency for computationally heavy workloads. However, current software and system support for accelerators is limited, and no production-ready solutions have yet been provided for accelerators to be efficiently accessed or shared in domains such as cloud ...
Yu, Hangchen, 0000-0002-6515-6271
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Toward Functional Safety of Systolic Array-Based Deep Learning Hardware Accelerators
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021High accuracy and ever-increasing computing power have made deep neural networks (DNNs) the algorithm of choice for various machine learning, computer vision, and image processing applications across the computing spectrum.
Shamik Kundu +4 more
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