Results 81 to 90 of about 129,583 (223)
A new 130nm F.E readout chip for microstrip detectors
In the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly compact mixed-signal chip has been designed in 130nm CMOS technology intended to read Silicon strip detectors for the experiments at the future International ...
Comerma, Albert +5 more
core +1 more source
Study of First-Order Thermal Sigma-Delta Architecture for Convective Accelerometers
This paper presents the study of an original closed-loop conditioning approach for fully-integrated convective inertial sensors. The method is applied to an accelerometer manufactured on a standard CMOS technology using an auto-aligned bulk etching step.
Latorre, Laurent +3 more
core +4 more sources
Lipid nanoparticles (LNPs) are optimized to co‐deliver Cas9‐encoding messenger RNA (mRNA), a single guide RNA (sgRNA) targeting the endogenous cystic fibrosis transmembrane conductance regulator (CFTR) gene, and homologous linear double‐stranded donor DNA (ldsDNA) templates encoding CFTR.
Ruth A. Foley +12 more
wiley +1 more source
This paper presents a fast multiple sampling method for low-noise CMOS image sensor (CIS) applications with column-parallel successive approximation register analog-to-digital converters (SAR ADCs). The 12-bit SAR ADC using the proposed multiple sampling
Min-Kyu Kim +2 more
doaj +1 more source
A study of digital gyro compensation loops [PDF]
The feasibility is discussed of replacing existing state-of-the-art analog gyro compensation loops with digital computations. This was accomplished by designing appropriate compensation loops for the dry turned TDF gyro, selecting appropriate data ...
core +1 more source
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone +11 more
wiley +1 more source
Performance Analysis of 8-bit ODACs for VLC Applications [PDF]
A discrete optical power level stepping technique in visible light communication (VLC), also known, as an optical digital to analog conversion (ODAC) has been proposed.
A. Dobesch +3 more
doaj
Configurable Analog-Digital Conversion Using the Neural EngineeringFramework
Efficient Analog-Digital Converters (ADC) are one of the mainstays of mixed-signal integrated circuit design. Besides the conventional ADCs used in mainstream ICs, there have been various attempts in the past to utilize neuromorphic networks to ...
Christian G Mayr +3 more
doaj +1 more source
From a database of 170 pentagonal 2D materials, 4 candidates exhibiting altermagnetic ordering are screened. Furthermore, the spin‐splitting and unconventional boundary states in the pentagonal 2D altermagnetic monolayer MnS2 are investigated. A MnS2‐based altermagnetic tunneling junction is designed and, through ab initio quantum transport simulations,
Jianhua Wang +8 more
wiley +1 more source
FEATURES OF ANALOG-TO-DIGITAL CONVERSION IN MULTIPLE ELECTROCARDIOSIGNAL RECORDING SYSTEM
Background. Digitalization of medical information is the main physical process that determines the characteristics of medical information systems. Digital tools of modern medicine allow for breakthroughs in the very approach to treatment and prevention ...
A.Yu. Bodin, O.N. Bodin, M.N. Kramm
doaj +1 more source

