Results 51 to 60 of about 50,418 (238)

Smarter Sensors Through Machine Learning: Historical Insights and Emerging Trends across Sensor Technologies

open access: yesAdvanced Functional Materials, EarlyView.
This review highlights how machine learning (ML) algorithms are employed to enhance sensor performance, focusing on gas and physical sensors such as haptic and strain devices. By addressing current bottlenecks and enabling simultaneous improvement of multiple metrics, these approaches pave the way toward next‐generation, real‐world sensor applications.
Kichul Lee   +17 more
wiley   +1 more source

A 200-MS/s 10-Bit SAR ADC Applied in WLAN Systems

open access: yesApplied Sciences, 2023
This paper introduces a new high-performance successive approximation register (SAR) analog-to-digital converter (ADC) designed for high-speed and low-power wireless local area network (WLAN) applications using a SMIC 55 nm 1p8m CMOS process.
Yu Zhang   +4 more
doaj   +1 more source

DSP Linearization for Millimeter-Wave All-Digital Receiver Array with Low-Resolution ADCs

open access: yes, 2019
Millimeter-wave (mmWave) communications and cell densification are the key techniques for the future evolution of cellular systems beyond 5G. Although the current mmWave radio designs are focused on hybrid digital and analog receiver array architectures,
Cabric, Danijela, Yan, Han
core   +1 more source

A low power and low signal 5-bit 25MS/s pipelined ADC for monolithic active pixel sensors [PDF]

open access: yes, 2007
For CMOS monolithic active pixels sensor readout, we developed a 5 bit low power analog to digital converter using a pipelined architecture. A non-resetting sample and hold stage is included to amplify the signal by a factor of 4.
Bouvier, J.   +7 more
core   +3 more sources

Real‐Time 3D Ultrasound Imaging with an Ultra‐Sparse, Low Power Architecture

open access: yesAdvanced Healthcare Materials, EarlyView.
This article presents a novel, ultra‐sparse ultrasound architecture that paves the way for wearable real‐time 3D imaging. By integrating a unique convolutional array with chirped data acquisition, the system achieves high‐resolution volumetric scans at a fraction of the power and hardware complexity.
Colin Marcus   +9 more
wiley   +1 more source

Transistor‐Level Activation Functions via Two‐Gate Designs: From Analog Sigmoid and Gaussian Control to Real‐Time Hardware Demonstrations

open access: yesAdvanced Materials, EarlyView.
Screen gate‐based transistors are presented, enabling tunable analog sigmoid and Gaussian activations. The SA‐transistor improves MRI classification accuracy, while the GA‐transistor supports precise Gaussian kernel tuning for forecasting. Both functions are implemented in a single device, offering compact, energy‐efficient analog AI processing ...
Junhyung Cho   +9 more
wiley   +1 more source

Design of pixel-level ADCs for energy-sensitive hybrid pixel detectors [PDF]

open access: yes, 2000
Single-photon counting hybrid pixel detectors have shown\ud to be a valid alternative to other types of X-ray imaging\ud devices due to their high sensitivity, low noise, linear behavior\ud and wide dynamic range.
Nauta, Bram   +2 more
core   +8 more sources

Observation of Dislocation Bound States and Skin Effects in Non‐Hermitian Chern Insulators

open access: yesAdvanced Materials, EarlyView.
Experimental observation of the dislocation‐induced bound states and skin effects is demonstrated in a line‐gap non‐Hermitian acoustic lattice. By utilizing active meta‐atoms to measure the full complex spectrum and biorthogonal eigenstates, the study reveals the exceptional‐point‐driven melting of defect modes.
Jia‐Xin Zhong, Bitan Roy, Yun Jing
wiley   +1 more source

A 14-Bit Hybrid Analog-to-Digital Converter for Infrared Focal Plane Array Digital Readout Integrated Circuit

open access: yesSensors
This paper presents a 14-bit hybrid column-parallel compact analog-to-digital converter (ADC) for the application of digital infrared focal plane arrays (IRFPAs) with compromised power and speed performance.
Douming Hu   +7 more
doaj   +1 more source

A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior [PDF]

open access: yes, 2009
A 6-bit 1.2 Gs/s non-calibrated flash ADC in a standard 45nm CMOS process, that achieves 0.45pJ/conv-step at full Nyquist bandwidth, is presented. Power efficient operation is achieved by a full optimization of amplifier blocks, and by innovations in the
Annema, Anne-Johan   +5 more
core   +3 more sources

Home - About - Disclaimer - Privacy