Results 61 to 70 of about 68,896 (280)

A 200-MS/s 10-Bit SAR ADC Applied in WLAN Systems

Applied Sciences, 2023
This paper introduces a new high-performance successive approximation register (SAR) analog-to-digital converter (ADC) designed for high-speed and low-power wireless local area network (WLAN) applications using a SMIC 55 nm 1p8m CMOS process.
Yu Zhang, Yilin Pu, Bin Wu, Taishan Mo, Tianchun Ye   +4 more
doaj   +1 more source

Multi‐Scale Interface Engineering of MXenes for Multifunctional Sensory Systems

Advanced Functional Materials, EarlyView.
MXenes, as two‐dimensional transition metal carbides and nitrides, demonstrate remarkable capabilities for multifunctional sensing applications. This review systematically examines multi‐scale interface engineering approaches that enhance sensing performance, enable diverse detection functionalities, and improve system‐level compatibility in MXene ...
Jiaying Liao, Sin‐Yi Pang, Jianhua Hao
wiley   +1 more source

Design of pixel-level ADCs for energy-sensitive hybrid pixel detectors [PDF]

, 2000
Single-photon counting hybrid pixel detectors have shown\ud to be a valid alternative to other types of X-ray imaging\ud devices due to their high sensitivity, low noise, linear behavior\ud and wide dynamic range.
Nauta, Bram, San Segundo Bello, David, Visschers, Jan   +2 more
core   +8 more sources

A 14-Bit Hybrid Analog-to-Digital Converter for Infrared Focal Plane Array Digital Readout Integrated Circuit

Sensors
This paper presents a 14-bit hybrid column-parallel compact analog-to-digital converter (ADC) for the application of digital infrared focal plane arrays (IRFPAs) with compromised power and speed performance.
Douming Hu, Libin Yao, Nan Chen, Jiqing Zhang, Shengyou Zhong, Wenbiao Mao, Fang Zhu, Juan Zhang   +7 more
doaj   +1 more source

A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology [PDF]

, 1999
This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully differential switched-capacitor circuits with a clock frequency of 35.2 MHz, and has a power consumption of ...
Medeiro Hidalgo, Fernando, Pérez Verdú, Belén, Rodríguez Vázquez, Ángel Benito   +2 more
core   +1 more source

Real‐Time 3D Ultrasound Imaging with an Ultra‐Sparse, Low Power Architecture

Advanced Healthcare Materials, EarlyView.
This article presents a novel, ultra‐sparse ultrasound architecture that paves the way for wearable real‐time 3D imaging. By integrating a unique convolutional array with chirped data acquisition, the system achieves high‐resolution volumetric scans at a fraction of the power and hardware complexity.
Colin Marcus, Md Osman Goni Nayeem, Aastha Shah, Jason Hou, Shrihari Viswanath, Maya Eusebio, David Sadat, Anantha P. Chandrakasan, Tolga Ozmen, Canan Dagdeviren   +9 more
wiley   +1 more source

A Power-Efficient 16-bit 1-MS/s Successive Approximation Register Analog-to-Digital Converter with Digital Calibration in 0.18 μm Complementary Metal Oxide Semiconductor

Journal of Low Power Electronics and Applications
A power-efficient 16-bit 1-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) is presented in this paper. High-bit sampling makes the bridge capacitance in the digital-to-analog converter (DAC) a unit one, eliminating ...
Xinyuan He, Weifeng Qiao, Xinpeng Xing, Haigang Feng   +3 more
doaj   +1 more source

A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor

The Scientific World Journal, 2017
The CMOS Monolithic Active Pixel Sensor (MAPS) for the International Linear Collider (ILC) vertex detector (VXD) expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC).
Mostafa Chakir, Hicham Akhamal, Hassan Qjidaa   +2 more
doaj   +1 more source

Transistor‐Level Activation Functions via Two‐Gate Designs: From Analog Sigmoid and Gaussian Control to Real‐Time Hardware Demonstrations

Advanced Materials, EarlyView.
Screen gate‐based transistors are presented, enabling tunable analog sigmoid and Gaussian activations. The SA‐transistor improves MRI classification accuracy, while the GA‐transistor supports precise Gaussian kernel tuning for forecasting. Both functions are implemented in a single device, offering compact, energy‐efficient analog AI processing ...
Junhyung Cho, Youngmin Han, Won Woo Lee, Youngwoo Yoo, Kannan Udaya Mohanan, Chang‐Hyun Kim, Junhwan Choi, Young‐Joon Kim, Wonjun Shin, Hocheon Yoo   +9 more
wiley   +1 more source

A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS

IEEE Access
A 12-bit time-interleaved (TI) analog-to-digital converter (ADC) with pipelined successive-approximation (SAR) channels is presented in this paper. The ADC consists of four TI channels, each incorporating a two-stage pipelined asynchronous SAR ADC.
Hamid Karrari, Pietro Andreani, Siyu Tan
doaj   +1 more source