Results 1 to 10 of about 7,976 (245)
Accurate Power-Efficient Format-Scalable Multi-Parallel Optical Digital-to-Analogue Conversion [PDF]
Photonics, 2021 In optical transmitters generating multi-level constellations, optical modulators are preceded by Electronic Digital-to-Analog-Converters (eDAC). It is advantageous to use eDAC-free Optical Analog to Digital Converters (oDAC) to directly convert digital ...
Moshe Nazarathy, Ioannis Tomkos
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Upregulation of transmitter release probability improves a conversion of synaptic analogue signals into neuronal digital spikes [PDF]
Molecular Brain, 2012 Action potentials at the neurons and graded signals at the synapses are primary codes in the brain. In terms of their functional interaction, the studies were focused on the influence of presynaptic spike patterns on synaptic activities.
Yu Jiandong, Qian Hao, Wang Jin-Hui
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Doklady Belorusskogo gosudarstvennogo universiteta informatiki i radioèlektroniki, 2023 The paper presents a technique for estimating the information parameters of the quantization noise generated by the analog-to-digital conversion of the measuring signal. An experiment and algorithm descriptions are presented to confirm the correctness of
V. K. Zheleznyak +2 more
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Regulation of EGFR signal transduction by analogue-to-digital conversion in endosomes
eLife, 2015 An outstanding question is how receptor tyrosine kinases (RTKs) determine different cell-fate decisions despite sharing the same signalling cascades. Here, we uncovered an unexpected mechanism of RTK trafficking in this process.
Roberto Villaseñor +4 more
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IET Circuits, Devices and Systems, 2022 Mismatch in the binary‐weighted capacitive digital‐to‐analog converter (DAC) greatly affects the linearity of the successive‐approximation‐register (SAR) ADC by deteriorating the total harmonic distortion (THD).
Li Dong +8 more
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Asynchronous SAR ADC with self‐timed track‐and‐hold
Electronics Letters, 2023 This paper presents an asynchronous SAR ADC featuring a self‐timed track‐and‐hold (STH) architecture. The design aims to address the common timing issue of divider‐based clock generation, where the fixed‐time track‐and‐hold (FTH) period often results in ...
Sunghyun Bae +4 more
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A novel bandgap voltage reference based on folding compensation
Electronics Letters, 2023 This letter proposes a novel bandgap reference circuit that utilizes both curvature and folding compensation to achieve a temperature coefficient (TC) of 2.23 ppm/°C.
Mingyu Liu +4 more
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Method of high timing resolution pulse synthesis based on virtual sampling [PDF]
Metrology and Measurement Systems, 2022 Adjustable-width pulse signals are widely used in systems such as test equipment for hold time, response time and radar testing. In this study, we proposed a pulse generation method based on virtual sampling with ultra-high pulse width resolution. In the
Hanglin Liu +4 more
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A 1.2V −55°C‐125°C ultra‐low noise bandgap voltage reference without start‐up circuit
Electronics Letters, 2023 This paper proposes a novel bandgap voltage reference (BGR) with low temperature coefficient, ultra‐low noise and without start‐up circuit. Designed in a TSMC 180‐nm CMOS technology, this bandgap voltage reference operates in the temperature range of −55
Linzhi Tao, Haoyu Zhuang, Qiang Li
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A neural network based background calibration for pipelined‐SAR ADCs at low hardware cost
Electronics Letters, 2023 This paper proposes a background calibration scheme for the pipelined‐Successive Approximation Register (SAR) Analog‐to‐Digital Converter (ADC) based on the neural network.
Yuguo Xiang +5 more
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