Results 11 to 20 of about 7,976 (245)
IET Optoelectronics, 2023 Optical digital‐to‐analog converters (DACs) are key to overcoming the enormous power consumption caused by the slowdown of Moore's Law. In previous work, an optical DAC consisting of a signal generator and an intensity converter was presented.
Yohei Aikawa, Hiroyuki Uenohara
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Electronics Letters, 2022 The authors present a low‐power area‐efficient subarray beamforming receiver (RX) structure for a miniaturized 3‐D ultrasound imaging system. Given that the delay‐and‐sum (DAS) and digitization functions consume most of the area and power in the receiver,
Seungah Lee, Soohyun Yun, Joonsung Bae
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A capacitor mismatch calibration scheme for SAR ADC based on genetic algorithm
Electronics Letters, 2023 Capacitor mismatch problem due to process variation causes weight error, which deteriorates the linearity of SAR ADC. In this paper, a novel calibration scheme based on genetic algorithm(GA) combined with a radix‐less‐than‐2 SAR ADC is proposed to ...
Yujia Huang +4 more
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Electronics Letters, 2023 This letter presents an 11 b 200 MS/s 28 nm CMOS 2b/cycle successive‐approximation register (SAR) analogue‐to‐digital converter (ADC). The offset calibration technique is proposed to reduce the comparator offset mismatch that degrades the linearity of ...
Jaehyuk Lee +9 more
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Digital calibration technique based AC injection for continuous‐time sigma‐delta converters
Electronics Letters, 2023 In this study, a digital calibration method applicable for a continuous‐time sigma‐delta analogue‐to‐digital converter is proposed using the AC injection technique.
Shengling Zhu, Lei Chen, Jie Su
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Timing Jitter Analysis and Mitigation in Hybrid OFDM-DFMA PONs
IEEE Photonics Journal, 2021 Hybrid orthogonal frequency division multiplexing-digital filter multiple access passive optical networks (OFDM-DFMA PONs) offer a cost-effective solution to the challenging requirements of next-generation optical access networks and 5G and beyond radio ...
Omaro Fawzi Abdelhamid Gonem +2 more
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Process and temperature robust time‐difference amplifier with analog calibration
The Journal of Engineering, 2022 An analogue calibration CMOS circuit for a time‐difference amplifier is presented and compared over a digital calibration scheme in terms of process and temperature variations.
Uriel A. Melo‐Pinzón +1 more
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Low Power, Compact Integrated Photonic Sampler Based on a Silicon Ring Modulator
IEEE Photonics Journal, 2022 Sampling is the primary functional step of an analogue to digital conversion, required for sensing, measurement, signal processing, metrology, and various data communication applications. Here we present, for the first time, to the best of our knowledge,
Mohamed I. Hosni +7 more
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A 0.002‐mm2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC)
IET Circuits, Devices and Systems, 2021 Digital‐to‐analogue converters (DACs) are essential blocks for interfacing the digital environment with the real world. A novel architecture, using a digital‐to‐time converter (DTC) and a time‐to‐voltage converter (TVC), is employed to form a low‐power ...
Ali H. Hassan +4 more
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An 8‐bit digital‐to‐time converter with pre‐skewing and time interpolation
IET Circuits, Devices and Systems, 2021 This study presents an 8‐bit delay line digital‐to‐time converter (DTC) with pre‐skewing and digital time interpolation. Pre‐skewing that lowers the per‐stage‐delay of delay lines beyond that set by the chosen technology is investigated.
Daniel Junehee Lee +3 more
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