Results 91 to 100 of about 146,240 (250)

Design of FPGA physical automatic testing environment based on Testbench

Dianzi Jishu Yingyong, 2018
According to the shortcomings of simulation testing and physical testing method of FPGA software testing, a design of FPGA physical automatic testing environment based on simulation testing case was proposed.
Gao Hu, Feng Erqiang, Zhao Gang
doaj   +1 more source

Entropy‐Guided Convolutional Neural Network Classification of Sensor Signals for Real‐Time Surface Quality Monitoring in Direct Laser Interference Patterning

Advanced Intelligent Systems, EarlyView.
Neural‐network pipeline for real‐time DLIP surface‐quality monitoring: spectral entropy of WLI topographies is used to generate interpretable K‐means labels, which are transferred to time‐resolved photodiode traces. A compact dual‐input 1D‐CNN (signal + laser parameters) learns discriminative spatiotemporal features and predicts “OK/NOK” surface ...
Marcelo Daniel Sallese, Ignacio Tabares, Wei Wang, Marcos Soldera, Andrés Fabián Lasagni   +4 more
wiley   +1 more source

On the comparison of memristor-transistor hybrid and transistor-only heterogeneous FPGAs

Journal of King Saud University: Computer and Information Sciences, 2019
Recently, memristor-CMOS based hybrid, homogeneous reconfigurable architectures have gained popularity as they offer better area results compared to their CMOS-only counterparts.
Umer Farooq, M. Hassan Aslam, Muhammad Usman   +2 more
doaj   +1 more source

Wearable exoskeleton robot control using radial basis function‐based fixed‐time terminal sliding mode with prescribed performance

Asian Journal of Control, EarlyView.
Abstract This paper tackles the problem of robust and accurate fixed‐time tracking in human–robot interaction and deals with uncertainties. This work introduces a control approach for a wearable exoskeleton designed specifically for rehabilitation tasks.
Mahmoud Abdallah, Yassine Kali, Maarouf Saad, Raouf Fareh, Maamar Bettayeb   +4 more
wiley   +1 more source

Efficient FPGA Implementation of OpenCL High-Performance Computing Applications via High-Level Synthesis

IEEE Access, 2017
FPGA-based accelerators have recently evolved as strong competitors to the traditional GPU-based accelerators in modern high-performance computing systems. They offer both high computational capabilities and considerably lower energy consumption.
Fahad Bin Muslim, Liang Ma, Mehdi Roozmeh, Luciano Lavagno   +3 more
doaj   +1 more source

Ultra‐High‐Efficiency On‐Chip CO2 Conversion by Nanosecond Self‐Pulsing Micro‐Plasma Devices

Carbon Energy, EarlyView.
A micro‐plasma chip with sub‐10‐μm electrode gaps is introduced for efficient CO2‐to‐CO conversion. The device self‐converts a DC power supply into nanosecond pulses, producing field‐emission electrons that vibrationally excite CO2, driving dissociation via the ladder‐climbing mechanism. A scaled‐up chip array achieves 30% single‐pass conversion and 50%
Guangyu Sun, Bartu Karakurt, Hongkeng Zhu, Onder Soydal, Jeremy S. Luterbacher, Elison Matioli   +5 more
wiley   +1 more source

A New Strategy to Design Reconfigurable Rivest–Shamir–Adleman (RSA) Accelerators

International Journal of Circuit Theory and Applications, EarlyView.
A reconfigurable FPGA‐based RSA accelerator is proposed using compression‐based modular multipliers combined with pseudomoduli arithmetic. The approach maps modular exponentiation to low‐cost arithmetic domains and applies a correction stage, achieving significant improvements in delay, operating frequency, and delay–area efficiency compared with ...
Augusto C. B. Vassoler, Gabriel B. M. Fernandes, Lucas R. Kieslich, Eduardo A. Bezerra, Hector Pettenghi   +4 more
wiley   +1 more source

Implementation of High Speed Tangent Sigmoid Transfer Function Approximations for Artificial Neural Network Applications on FPGA

Advances in Electrical and Computer Engineering, 2018
Tangent Sigmoid (TanSig) Transfer Function (TSTF) is one of the nonlinear functions used in Artificial Neural Networks (ANNs). As TSTF includes exponential function operations, hardware-based implementation of this function is difficult.
KOYUNCU, I.
doaj   +1 more source

Self-Partial and Dynamic Reconfiguration Implementation for AES using FPGA [PDF]

, 2009
This paper addresses efficient hardware/software implementation approaches for the AES (Advanced Encryption Standard) algorithm and describes the design and performance testing algorithm for embedded system.
Alaoui Ismaili, Zine El Abidine, Moussa, Ahmed   +1 more
core   +1 more source

Dynamic Multifunctional Metasurfaces Based on Passive Cascade Structure

Electron, EarlyView.
A dynamic multifunctional metasurface is proposed in this paper. Unlike mainstream multifunctional metasurface based on programmable metasurfaces, it consists of two passive metasurfaces, presenting a significant cost advantage. By controlling the displacement, different functions such as beam steering, focusing, and OAM wave generation can be realized
Xiangming Wu, Yifeng Wang, Haoyang Shi, Jie Tian, Xiong Wang, Weiren Zhu   +5 more
wiley   +1 more source