Results 71 to 80 of about 146,240 (250)

Optimizations in Dynamic Binary Translation

Труды Института системного программирования РАН, 2018
We suggest using OpenCL standard for programming FPGA devices that are used as accelerators in a heterogeneous system. We describe the implementation of a subset of OpenCL that is required for organizing data exchange and task management for FPGAs given ...
Andrey Belevantsev, Alexey Merkulov, Vladimir Platonov   +2 more
doaj  

Liquid Metals in Radio Frequency Applications: A Review of Physics, Manufacturing, and Emerging Technologies

Advanced Electronic Materials, EarlyView.
This paper reviews the physics of liquid metals in RF devices, including the influence of mechanical strain on resonance as well as fabrication methods and strategies for designing tunable and strain‐tolerant inductors, capacitors, and antennas.
Md Saifur Rahman, William J. Scheideler
wiley   +1 more source

A General and Efficient Framework for the Rapid Design of Miniaturized, Wideband, and High‐Bit RIS

Advanced Electronic Materials, EarlyView.
A general and efficient framework is proposed for the rapid design of high‐performance reconfigurable intelligent surfaces (RISs). This framework integrates advanced antenna design techniques and incorporates various load types, quantities, and values to achieve the design of high‐performance RISs.
Jun Wei Zhang, Zheng Xing Wang, Wanwan Cao, Zhen Jie Qi, Li Jie Wu, Han Qing Yang, Qun Yan Zhou, Si Ran Wang, Hui Dong Li, Jun Yan Dai, Jiang Luo, Jun Wei Wu, Jia Nan Zhang, Zhen Zhang, Qiang Cheng   +14 more
wiley   +1 more source

Using FPGA for visuo-motor control with a silicon retina and a humanoid robot [PDF]

, 2007
The address-event representation (AER) is a neuromorphic communication protocol for transferring asynchronous events between VLSI chips. The event information is transferred using a high speed digital parallel bus.
Delbrück, T., Gómez Rodríguez, Francisco de Asís, Jiménez Fernández, Ángel Francisco, Lichtensteiner, P., Linares Barranco, Alejandro   +4 more
core  

Terahertz Channel Modeling, Estimation and Localization in RIS‐Assisted Systems

Advanced Electronic Materials, EarlyView.
Reconfigurable intelligent surfaces have become a recent intensive research focus. Based on practical applications, channel strategies for RIS‐assisted terahertz wireless communication systems are categorized into three different types: channel modeling, channel estimation, and channel localization.
Hongjing Wang, Weipeng Wang, Xuan Cong, Shiyu Wang, Gao Li, Sen Gong, Lin Huang, Hongxin Zeng, Yaxin Zhang, Ziqiang Yang   +9 more
wiley   +1 more source

Research on the Security of SRAM-Based FPGAs in the Era of Artificial Intelligence

Journal of Low Power Electronics and Applications
SRAM-based FPGAs, with their flexible programmability and parallel execution features, have been widely used, and the security of such devices has drawn significant attention.
Jing Zhou, Xiangyu Zhao, Shengbing Zhang, Lei Chen, Ke Xiao, Shuo Wang   +5 more
doaj   +1 more source

Study of combining GPU/FPGA accelerators for high-performance computing [PDF]

, 2013
This contribution presents the performance modeling of a super desktop with GPU and FPGA accelerators, using OpenCL for the GPU and a high-level synthesis compiler for the FPGAs.
Braeken, An, Cornelis, Jan G, D'Hollander, Erik, da Silva Gomes, Bruno, Lemeire, Jan, Touhafi, Abdellah   +5 more
core   +1 more source

RRAM Variability Harvesting for CIM‐Integrated TRNG

Advanced Electronic Materials, EarlyView.
This work demonstrates a compute‐in‐memory‐compatible true random number generator that harvests intrinsic cycle‐to‐cycle variability from a 1T1R RRAM array. Parallel entropy extraction enables high‐throughput bit generation without dedicated circuits. This approach achieves NIST‐compliant randomness and low per‐bit energy, offering a scalable hardware
Ankit Bende, Gokulnath Rajendran, Regina Dittmann, Anupam Chattopadhyay, Vikas Rana   +4 more
wiley   +1 more source

Fundamental Challenges, Physical Implementations, and Integration Strategies for Ising Machines in Large‐Scale Optimization Tasks

Advanced Electronic Materials, EarlyView.
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley   +1 more source

SqueezeJet: High-level Synthesis Accelerator Design for Deep Convolutional Neural Networks

, 2018
Deep convolutional neural networks have dominated the pattern recognition scene by providing much more accurate solutions in computer vision problems such as object recognition and object detection.
Mousouliotis, Panagiotis G., Petrou, Loukas P.   +1 more
core   +1 more source