Results 11 to 20 of about 5,654 (232)
Energy-efficient design of CNTFET-based quaternary arithmetic circuits [PDF]
Scientific ReportsThe vast interconnection between digital logic blocks is the main challenge faced in chip designing, which leads to increased area overheads and average power consumption.
Ajay Rupani +2 more
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Wafer-scale radio frequency ZnO Schottky diodes and arithmetic circuits [PDF]
Scientific ReportsModern telecommunication technologies, such as the 5G and upcoming 6G networks, rely on devices operating in the radio frequency (RF) spectrum of 0.3–90 GHz and 7–300 GHz, respectively.
Harold F. Mazo-Mantilla +8 more
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Generic logic block based on bias-gated 2D MoS2 transistors [PDF]
Nature CommunicationsIntegrating two-dimensional (2D) semiconductors and CMOS technology is a promising pathway for next-generation integrated circuits. However, the implementation of this strategy is hindered by the limited polarity modulation of 2D semiconductors and the ...
Xiaofu Wei +10 more
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CoRR, 2020 30 pages. Final version, to appear in Theory of Computing. A preliminary version of this work was presented at the International Colloquium on Automata, Languages and Programming (ICALP ...
Anuj Dawar, Gregory Wilsenach
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ACV: an arithmetic circuit verifier [PDF]
Proceedings of International Conference on Computer Aided Design, 2002 Based on a hierarchical verification methodology, we present an arithmetic circuit verifier ACV, in which circuits expressed in a hardware description language, also called ACV, are symbolically verified using Binary Decision Diagrams for Boolean functions and multiplicative Binary Moment Diagrams (*BMDs) for wordlevel functions.
Yirng-An Chen, Randal E. Bryant
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On the Realistic Worst-Case Analysis of Quantum Arithmetic Circuits
IEEE Transactions on Quantum Engineering, 2022 We provide evidence that commonly held intuitions when designing quantum circuits can be misleading. In particular, we show that 1) reducing the T-count can increase the total depth; 2) it may be beneficial to trade controlled NOTs for measurements in ...
Alexandru Paler +2 more
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CoRR, 2012 Graphical models are usually learned without regard to the cost of doing inference with them. As a result, even if a good model is learned, it may perform poorly at prediction, because it requires approximate inference. We propose an alternative: learning models with a score function that directly penalizes the cost of inference. Specifically, we learn
Daniel Lowd, Pedro M. Domingos
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Functions Definable by Arithmetic Circuits [PDF]
, 2009 An arithmetic circuit is a labelled, directed, acyclic graph specifying a cascade of arithmetic and logical operations to be performed on sets of non-negative integers. In this paper, we consider the definability of functions from tuples of sets of non-negative integers to sets of non-negative integers by means of arithmetic circuits.
Ian Pratt-Hartmann, Ivo Düntsch
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Synthesis and Arithmetic of Single Qutrit Circuits [PDF]
QuantumIn this paper we study single qutrit circuits consisting of words over the Clifford$+\mathcal{D}$ cyclotomic gate set, where $\mathcal{D}=\text{diag}(\pm\xi^{a},\pm\xi^{b},\pm\xi^{c})$, $\xi$ is a primitive $9$-th root of unity and $a,b,c$ are integers ...
Amolak Ratan Kalra +2 more
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A Monotonic Early Output Asynchronous Full Adder
Technologies, 2023 This article introduces a novel asynchronous full adder that operates in an input–output mode (IOM), displaying both monotonicity and an early output characteristic.
Padmanabhan Balasubramanian +1 more
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