Results 41 to 50 of about 5,654 (232)

How to Garble Arithmetic Circuits [PDF]

SIAM Journal on Computing, 2011
Yao's garbled circuit construction transforms a boolean circuit $C:\{0,1\}^n\to\{0,1\}^m$ into a “garbled circuit” $\hat{C}$ along with $n$ pairs of $k$-bit keys, one for each input bit, such that $\hat{C}$ together with the $n$ keys corresponding to an input $x$ reveal $C(x)$ and no additional information about $x$. The garbled circuit construction is
Benny Applebaum, Yuval Ishai, Eyal Kushilevitz   +2 more
openaire   +3 more sources

Design Principles for Alloy‐Anode‐Based Low‐Stack‐Pressure Solid‐State Batteries

Advanced Science, EarlyView.
Design principles for matching alloy anodes with solid electrolytes to achieve low‐pressure solid‐state batteries are identified through electro‐chemo‐mechanical modeling, which reveals the critical stack pressure for interfacial stability, and validated experimentally.
Yuping Huang, Zhe‐Tao Sun, Xinyu Yu, Shiwei Chen, Chen Su, Jia Li, Shou‐Hang Bo, Hong Zhu   +7 more
wiley   +1 more source

On Relaxing Determinism in Arithmetic Circuits

CoRR, 2017
The past decade has seen a significant interest in learning tractable probabilistic representations. Arithmetic circuits (ACs) were among the first proposed tractable representations, with some subsequent representations being instances of ACs with weaker or stronger properties.
Arthur Choi, Adnan Darwiche
openaire   +3 more sources

Spatially Encoded Protocell Network for Non‐Cascaded Parallel Biocomputation

Advanced Science, EarlyView.
A non‐cascaded, hydrogel‐based proteinosome computational platform is developed, in which redox‐responsive proteinosomes serve as local computing units within a shared reaction–diffusion field. Reductant inputs, countered by an auxiliary glucose gradient, regulate spatially patterned proteinosome disruption, and generate population‐level boundaries ...
Shuqi Wu, Liangfei Tian
wiley   +1 more source

Broadband plasmonic half-subtractor and digital demultiplexer in pure parallel connections

Nanophotonics, 2022
Nanophotonic arithmetic circuits requiring cascaded Boolean operations are difficult to implement due to loss and footprint issues. In this work, we experimentally demonstrate plasmonic half-subtractor and demultiplexer circuits based on transmission ...
Wu Pei-Yuan, Chang Yun-Chorng, Huang Chen-Bin   +2 more
doaj   +1 more source

Updatable Closed‐Form Evaluation of Arbitrarily Complex Multiport Network Connections

Advanced Electronic Materials, EarlyView.
The inverse design of electrically large wave devices often uses reduced‐order multiport models with discrete optimization, requiring many evaluations of complex interconnections between subsystems that differ only in a few blocks. This paper introduces a closed‐form framework enabling efficient Woodbury low‐rank updates of related, previous ...
Hugo Prod'homme, Philipp del Hougne
wiley   +1 more source

New High-Speed Arithmetic Circuits Based on Spiking Neural P Systems with Communication on Request Implemented in a Low-Area FPGA

Mathematics
During the last years, the demand for internet-of-things (IoT) resource-constrained devices has grown exponentially. To address this need, several digital methods have been proposed to improve these devices in terms of area and power consumption. Despite
José Rangel, Esteban Anides, Eduardo Vázquez, Giovanny Sanchez, Juan-Gerardo Avalos, Gonzalo Duchen, Linda K. Toscano   +6 more
doaj   +1 more source

Passive hand movements disrupt adults’ counting strategies

Frontiers in Psychology, 2011
In the present study, we experimentally tested the role of hand motor circuits in simple-arithmetic strategies. Educated adults solved simple additions (e.g., 8+3) or simple subtractions (e.g., 11–3) while they were required to retrieve the answer from ...
Ineke eImbo, André eVandierendonck, Wim eFias   +2 more
doaj   +1 more source

Optimizing Quantum Circuits for Arithmetic

CoRR, 2018
Many quantum algorithms make use of oracles which evaluate classical functions on a superposition of inputs. In order to facilitate implementation, testing, and resource estimation of such algorithms, we present quantum circuits for evaluating functions that are often encountered in the quantum algorithm literature.
Thomas Häner, Martin Roetteler, Krysta M. Svore   +2 more
openaire   +2 more sources

People Counting and Positioning Using Low‐Resolution Infrared Images for FeFET‐Based In‐Memory Computing

Advanced Electronic Materials, EarlyView.
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar, Li Zhang, Alexander Rehmer, Marc Lupp, Subhashree Baskaran, Osama Abdelaal, Franz Müller, Nandakishor Yadav, Bing Li, Thomas Kämpfe   +9 more
wiley   +1 more source