Results 51 to 60 of about 5,654 (232)

A Memristor‐Based In‐Memory Computing System‐on‐Chip with Efficient Depthwise Convolution

Advanced Intelligent Systems, EarlyView.
We present a memristor‐based in‐memory computing (IMC) architecture that enables efficient depthwise convolution (DWC) acceleration. Fabricated in a system‐on‐chip with crossbar arrays, the design improves memory utilization. Experimental validation demonstrates the first hardware acceleration of DWC in IMC, achieving a digital comparable inference ...
Wenhao Song, Fuxi Cai, Sangsu Park, Zhaoyan Li, Seonghun Lee, Mingyi Rao, Woohyung Choi, Seungin Shin, Yan Zhu, Sujin Chae, Myoungsub Kim, Mingche Wu, Hyejung Choi, Yuan Dao, Jaeyun Yi, Youngman Cho, Seon Yong Cha, Ning Ge, Qiangfei Xia, Soo Gil Kim, Miao Hu, J. Joshua Yang   +21 more
wiley   +1 more source

Fixed-Point Arithmetic in FPGA

Acta Polytechnica, 2005
Arithmetic operations are among the most frequently-used operations in contemporary digital integrated circuits. Various structures have been designed, utilizing different features of IC architectures.
M. Bečvář, P. Štukjunger
doaj  

A speed‐area‐efficient hardware ECPM‐engine in GF(p) over generic Weierstrass curves

Electronics Letters
This paper proposes a 256‐bit speed‐area‐efficient hardware elliptic curve point‐multiplication engine (ECPM‐engine) in GF(p) over generic Weierstrass curves, which is optimized by a new speed‐area‐efficient radix‐64 Montgomery modular multiplication ...
Yujun Xie, Zhenhui He, Yuan Liu, Xin Zheng, Shuting Cai, Xiaoming Xiong   +5 more
doaj   +1 more source

Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2015
A new benchmarking of beyond-CMOS exploratory devices for logic integrated circuits is presented. It includes new devices with ferroelectric, straintronic, and orbitronic computational state variables.
Dmitri E. Nikonov, Ian A. Young
doaj   +1 more source

Electronic-photonic arithmetic logic unit for high-speed computing

Nature Communications, 2020
Integrated photonics allows integration of complex optical circuits on a single chip. Here, the authors propose a wavelength division multiplexing based electronic-photonic arithmetic logic unit for computing at high speeds and with improved power ...
Zhoufeng Ying, Chenghao Feng, Zheng Zhao, Shounak Dhar, Hamed Dalir, Jiaqi Gu, Yue Cheng, Richard Soref, David Z. Pan, Ray T. Chen   +9 more
doaj   +1 more source

Exploiting Ferroelectric and Spintronic Dynamics for Neural Network Computation

Advanced Intelligent Systems, EarlyView.
Ferroelectric and spintronic devices, relying on the control of polarization and magnetization, offer intrinsically fast, durable, energy‐efficient, and low‐latency building blocks for analog in‐memory computing. The hysteretic dynamics of an order parameter are leveraged to provide nonvolatile, multistate memory and nonlinear switching. Brain‐inspired
Dashiell Harrison, Kevin Nadaud, Josquin Harrison, Guillaume F. Nataf, Laura Bégon‐Lours   +4 more
wiley   +1 more source

A Novel Low Power and Reduced Transistor Count Magnetic Arithmetic Logic Unit Using Hybrid STT-MTJ/CMOS Circuit

IEEE Access, 2020
One of the major concern for CMOS technology is the increase in power dissipation as the technology node lowers down to deep submicron region. Magnetic tunnel junction (MTJ) working on Spin transfer torque (STT) switching mechanism is recognized as one ...
Prashanth Barla, Vinod Kumar Joshi, Somashekara Bhat   +2 more
doaj   +1 more source

Overcoming the Phase Discontinuity Problem in RIS Optimization: A Robust and Scalable Phase‐Aware Deep Regression Framework via Hybrid CNN–LSTM Architecture

Advanced Intelligent Systems, EarlyView.
The phase discontinuity problem—where the cyclic nature of phase angles causes catastrophic errors near the ±π boundary—is a fundamental obstacle in learning‐based reconfigurable intelligent surface (RIS) optimization. A phase‐aware hybrid CNN–LSTM framework resolves this by decomposing phase predictions into sine–cosine components, mapping circular ...
Seda Savaşçı Şen, Ali Çalhan, Murtaza Cicioğlu, Oğuzhan Demiryürek   +3 more
wiley   +1 more source

Tractable Boolean and Arithmetic Circuits

CoRR, 2022
Tractable Boolean and arithmetic circuits have been studied extensively in AI for over two decades now. These circuits were initially proposed as "compiled objects," meant to facilitate logical and probabilistic reasoning, as they permit various types of inference to be performed in linear-time and a feed-forward fashion like neural networks.
openaire   +2 more sources

Physics‐Grounded Probabilistic Bits for Hardware‐Efficient Intelligent Inference and Optimization

Advanced Intelligent Systems, EarlyView.
Si–SiNx interface traps are harnessed as a complementary metal–oxide–semiconductor‐compatible source of controllable randomness for probabilistic bits. Pulse‐width‐programmed stochastic capture converts nanoscale defect dynamics into Boltzmann‐consistent binary outputs, while a physics‐based Simulation Program with Integrated Circuit Emphasis model ...
Dokyoung Lee, Jun‐Young Park, Joon‐Kyu Han, Sungho Kim   +3 more
wiley   +1 more source