Results 11 to 20 of about 776,828 (194)

Efficient Polynomial Multiplication for HQC on ARM Cortex-M4 [PDF]

Transactions on Cryptographic Hardware and Embedded Systems
In this paper, we propose the Hybrid FAFFT-CRT method for accelerating HQC polynomial multiplication on the ARM Cortex-M4. The method uses the Chinese Remainder Theorem to map the polynomial ring to a product of an FAFFTfriendly ring of size 2d+1 and a ...
Jihoon Jang, Myeonghoon Lee, Donggeun Kwon, Seokhie Hong, Suhri Kim, Sangjin Lee   +5 more
doaj   +4 more sources

Curve448 on 32-Bit ARM Cortex-M4 [PDF]

, 2021
Public key cryptography is widely used in key exchange and digital signature protocols. Public key cryptography requires expensive primitive operations, such as finite-field and group operations. These finite-field and group operations require a number of clock cycles to execute.
Hwajeong Seo, Reza Azarderakhsh
core   +5 more sources

SIKE Round 2 Speed Record on ARM Cortex-M4 [PDF]

, 2019
We present the first practical software implementation of Supersingular Isogeny Key Encapsulation (SIKE) round 2, targeting NIST’s 1, 2, and 5 security levels on 32-bit ARM Cortex-M4 microcontrollers. The proposed library introduces a new speed record of SIKE protocol on the target platform.
Hwajeong Seo, Amir Jalali, Reza Azarderakhsh   +2 more
core   +4 more sources

Falcon on ARM Cortex-M4: an Update. [PDF]

IACR Cryptol. ePrint Arch.
This note reports new implementation results for the Falcon signature algorithm on an ARM Cortex-M4 microcontroller.
Thomas Pornin
core   +3 more sources

Additive FFTs for HQC on ARM Cortex-M4, Revisited

Transactions on Cryptographic Hardware and Embedded Systems
This paper presents an optimized implementation of the Hamming Quasi- Cyclic (HQC) key encapsulation mechanism, leveraging the additive fast Fourier transform (FFT) for polynomial multiplication.
Ming-Shing Chen, Tun-You Chien, Chun-Ming Chiu, Han-Hsuan Lin, Chun-Tao Peng, Bo-Yin Yang   +5 more
doaj   +2 more sources

Memory Efficient Implementation of Modular Multiplication for 32-bit ARM Cortex-M4 [PDF]

Applied Sciences, 2020
In this paper, we present scalable multi-precision multiplication implementation and scalable multi-precision squaring implementation for 32-bit ARM Cortex-M4 microcontrollers.
Hwajeong Seo
doaj   +2 more sources

Faster NTRU on ARM Cortex-M4 With TMVP-Based Multiplication [PDF]

IEEE Transactions on Circuits and Systems I: Regular Papers, 2022
The Number Theoretic Transform (NTT), Toom-Cook, and Karatsuba are the most commonly used algorithms for implementing lattice-based ?nalists of the NIST PQC competition.
Irem Keskinkurt Paksoy, Murat Cenk
openaire   +4 more sources

Nibbling MAYO: Optimized Implementations for AVX2 and Cortex-M4 [PDF]

Transactions on Cryptographic Hardware and Embedded Systems
MAYO is a popular high-calorie condiment as well as an auspicious candidate in the ongoing NIST competition for additional post-quantum signature schemes achieving competitive signature and public key sizes.
Ward Beullens, Fabio Campos, Sofía Celi, Basil Hess, Matthias J. Kannwischer   +4 more
doaj   +5 more sources

Fly, you fool! Faster Frodo for the ARM Cortex-M4. [PDF]

IACR Cryptol. ePrint Arch., 2018
We present an efficient implementation of FrodoKEM-640 on an ARM Cortex-M4 core. We leverage the single instruction, multiple data paradigm, available in the instruction set of the ARM Cortex-M4, together with a careful analysis of the memory layout of ...
Joppe W. Bos, Simon Friedberger, Marco Martinoli, Elisabeth Oswald, Martijn Stam   +4 more
core   +3 more sources

pqm4: Testing and Benchmarking NIST PQC on ARM Cortex-M4. [PDF]

IACR Cryptol. ePrint Arch., 2019
Contains fulltext : 210214.pdf (Publisher’s version ) (Open Access)
Kannwischer, M.J., Rijneveld, J., Schwabe, P., Stoffelen, K.   +3 more
openaire   +3 more sources