Adaptive Hybrid Storage Format for Sparse Matrix–Vector Multiplication on Multi-Core SIMD CPUs
Applied Sciences, 2022 Optimizing sparse matrix–vector multiplication (SpMV) is challenging due to the non-uniform distribution of the non-zero elements of the sparse matrix. The best-performing SpMV format changes depending on the input matrix and the underlying architecture,
Shizhao Chen +3 more
doaj +1 more source
SOTPM: Software One-Time Programmable Memory to Protect Shared Memory on ARM Trustzone
IEEE Access, 2021 In ARM TrustZone-based architecture, shared memory is one of the most useful schemes to enable isolated execution environments supported by TrustZone to communicate between environments.
Dongwook Shim, Dong Hoon Lee
doaj +1 more source
Metrics and Tools for Evaluating the Deviation in Parallel Timing [PDF]
Jisuanji kexueIn parallel computing,instrumenting specific code segments is commonly used for performance evaluation on multicore processors.However,factors such as timing methods,hardware configurations,and runtime environments affect parallel timing accuracy ...
LIAO Qiucheng, ZHOU Yang, LIN Xinhua
doaj +1 more source
Leveraging Cache-Based Side-Channel Attacks for Coverage-Guided Fuzzing [PDF]
, 2022 Tato práce poskytuje přehled prvků ARMv8 architektury relevantních pro studium útoků postranními kanály založenými na pamětích cache. Dále zkoumá možnosti využití Flush+Flush útoku k extrakci informací o pokrytí kódu běžících programů na platformách ...
Jan Havránek
core
ARMv8 Shellcodes from ‘A’ to ‘Z’
, 2016 We describe a methodology to automatically turn arbitrary ARMv8 programs into alphanumeric executable polymorphic shellcodes. Shellcodes generated in this way can evade detection and bypass filters, broadening the attack surface of ARM-powered devices such as smartphones.
Hadrien Barral +4 more
openaire +3 more sources
Descripción de las maneras de emplear la extensión avanzada SIMD en las arquitecturas ARMv7-A y ARMv8-A de los procesadores ARM [PDF]
, 2022 Realizar una descripción sobre los diferentes métodos de utilizar la extensión avanzada SIMD en las arquitecturas ARMv7-A y ARMv8-A de los procesadores ARM, así explicar las características, los registros internos y las instrucciones de la extensión ...
Osorio Chamam, Manuel Estuardo
core +1 more source
Switchpoline: A Software Mitigation for Spectre-BTB and Spectre-BHB on ARMv8
ACM Asia Conference on Computer and Communications SecuritySpectre-BTB, also known as Spectre Variant 2, is often considered the most dangerous Spectre variant. While there are widely-deployed software workarounds on x86, such as Retpoline, there are no automated software workarounds for protecting generic ...
Lorenz Hetterich +3 more
semanticscholar +1 more source
WCET Analysis Based on Micro-Architecture Modeling for Embedded System Security
Applied SciencesTo ensure the timely execution of hard real-time applications, scheduling analysis techniques must consider safe upper bounds on the possible execution durations of tasks or runnables, which are referred to as Worst-Case Execution Times (WCET).
Meng Li +3 more
doaj +1 more source
High- and Low-Rank Optimization of SNOVA on ARMv8: From High-Security Applications to IoT Efficiency
ElectronicsThe increasing threat of quantum computing to traditional cryptographic systems has prompted intense research into post-quantum schemes. Despite SNOVA’s potential for lightweight and secure digital signatures, its performance on embedded devices (e.g ...
Minwoo Lee +3 more
semanticscholar +1 more source
System‐Aware Model Compression for Real‐Time Intelligent Monitoring in Edge Power IoT
IET Smart Grid, Volume 9, Issue 1, January/December 2026.This paper proposes a unified system‐aware model compression framework specifically designed for edge power IoT environments. By integrating controllable pruning, quantisation and compression‐distillation co‐design, the framework achieves up to 4× reduction in model size and significant latency improvements.
Xinxin Wu +5 more
wiley +1 more source