Results 11 to 20 of about 92,024 (251)

Hardware acceleration of number theoretic transform for zk‐SNARK

open access: yesEngineering Reports, EarlyView., 2023
An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao   +6 more
wiley   +1 more source

Characterisation of Medipix3 Silicon Detectors in a Charged-Particle Beam [PDF]

open access: yes, 2015
While designed primarily for X-ray imaging applications, the Medipix3 ASIC can also be used for charged-particle tracking. In this work, results from a beam test at the CERN SPS with irradiated and non-irradiated sensors are presented and shown to be in ...
Akiba, K.   +22 more
core   +3 more sources

An Energy-Efficient, Parallel Neighborhood and Adaptation Functions for Hardware Implemented Self-Organizing Maps Applied in Smart Grid

open access: yesEnergies, 2020
Smart Grids (SGs) can be successfully supported by Wireless Sensor Networks (WSNs), especially through these consisting of intelligent sensors, which are able to efficiently process the still growing amount of data.
Marta Kolasa
doaj   +1 more source

A TensorFlow Extension Framework for Optimized Generation of Hardware CNN Inference Engines

open access: yesTechnologies, 2020
The workloads of Convolutional Neural Networks (CNNs) exhibit a streaming nature that makes them attractive for reconfigurable architectures such as the Field-Programmable Gate Arrays (FPGAs), while their increased need for low-power and speed has ...
Vasileios Leon   +5 more
doaj   +1 more source

PARISROC, a Photomultiplier Array Integrated Read Out Chip [PDF]

open access: yes, 2009
PARISROC is a complete read out chip, in AMS SiGe 0.35 !m technology, for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and it belongs to an R&D program funded by the French national agency for ...
Berni, M. El   +6 more
core   +5 more sources

ASIC Framework Simplified and Operationalised – An Operational Matrix for Optimising the Use of Technologies and Innovations in Medical Education

open access: yesAdvances in Medical Education and Practice, 2022
Joshua Owolabi Anatomy Department, Division of Basic Medical Sciences, University of Global Health Equity, Butaro, RwandaCorrespondence: Joshua Owolabi, Email jowolabi@ughe.orgAbstract: The ASIC [adaptation, standardisation, integration and compliance ...
Owolabi J
doaj  

Interface design between LCD and intelligent water meter control ASIC based on fast binary to decimal conversion algo-rithm(基于快速二-十进制转换算法的智能水表专用控制芯片LCD接口设计)

open access: yesZhejiang Daxue xuebao. Lixue ban, 2010
针对智能水表控制芯片与LCD驱动芯片之间信号编码不一致并且转换复杂的问题,提出了一种ZY886B型液晶模块的接口电路.为提高转换速率、节省开销,设计的关键部分采用基于快速二-十进制转换算法的电路,该算法与其它二-十进制转换算法相比具有转换速率和面积上的优势.所设计LCD接口采用Verilog HDL描述,在Modelsim 6.0 SE版本上进行仿真和验证,在Design Compiler综合平台上进行优化综合.结果显示接口满足ZY886B的工作时序,最大时钟频率超过250 MHz,动态功耗小于1 mW.
ZHAOFeng(赵峰), XIAYin-shui(夏银水)
doaj   +1 more source

Multifunctional computing-in-memory SRAM cells based on two-surface-channel MoS2 transistors

open access: yesiScience, 2021
Summary: Driven by technologies such as machine learning, artificial intelligence, and internet of things, the energy efficiency and throughput limitations of the von Neumann architecture are becoming more and more serious.
Fan Wang   +7 more
doaj   +1 more source

Acid-sensing ion channels 1a (ASIC1a) inhibit neuromuscular transmission in female mice [PDF]

open access: yes, 2014
Acid-sensing ion channels (ASIC) open in response to extracellular acidosis. ASIC1a, a particular subtype of these channels, has been described to have a postsynaptic distribution in the brain, being involved not only in ischemia and epilepsy, but also ...
Colettis, Natalia Claudia   +8 more
core   +1 more source

System-Level Leakage Power Estimation Model for ASIC Designs

open access: yesAdvances in Electrical and Electronic Engineering, 2018
With advances in CMOS- technology and sub-micron process, leakage power dissipation has become a critical design metric. To incorporate more functions, designs are getting complex, thereby increases leakage power dissipation.
Abhishek Narayan Tripathi   +1 more
doaj   +1 more source

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