Results 31 to 40 of about 8,261 (169)

Design of an ASIC Digital Clock Using VLSI Technology

Applications of Modelling and Simulation, 2023
We present the design of an Application Specific Integrated Circuit (ASIC) digital clock based on the 0.12 µm deep submicron technology node. The widths of the PMOS and NMOS transistors are 0.72 µm and 0.24 µm, respectively.
Kim Ho Yeap, Yong Jun Tan, Yue Hong Chong, Siu Hong Loh, Jia Jia Sim, Ahmad Uzair Mazlan   +5 more
doaj  

ORGANIZATION OF CONNECTION OF BANK – INSURANCE COMPANY AS METHOD OF MANAGEMENT OF ORGANIZATIONAL RISK (FOR EXAMPLE OF RUSSIA AND ARMENIA)

Вестник Северо-Кавказского федерального университета, 2022
The article presents the trends of development of the banking and insurance markets of Russia and Ar- menia are presented. Processes of bank loans and pledge insurance under the loan are considered.
Arthur Volodyevich Poghosyan
doaj  

A Low Power All-Digital PLL With −40dBc In-Band Fractional Spur Suppression for NB-IoT Applications

IEEE Access, 2019
This paper proposes a low-power fractional-N all-digital PLL (ADPLL) for the narrow-band Internet-of-Things applications. Multi-step lock controlling and oscillator tuning word coarse prediction algorithms help to accelerate the locking process to less ...
Na Yan, Lei Ma, Yongxin Xu, Sizheng Chen, Xusong Liu, Junhui Xiang, Hao Min   +6 more
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An efficient leakage power optimization framework based on reinforcement learning with graph neural network

Scientific Reports
Threshold voltage ( $$V_{th}$$ V th ) assignment is convenient for leakage optimization due to the exponential relation between leakage power and $$V_{th}$$ V th by swapping logic cells without routing effort.
Peng Cao, Yuhan Dong, Zhanhua Zhang, Wenjie Ding, Jiahao Wang   +4 more
doaj   +1 more source

Wafer-scale functional circuits based on two dimensional semiconductors with fabrication optimized by machine learning

Nature Communications, 2021
Here, the authors demonstrate the application of machine learning to optimize the device fabrication process for wafer-scale 2D semiconductors, and eventually fabricate digital, analog, and optoelectrical circuits.
Xinyu Chen, Yufeng Xie, Yaochen Sheng, Hongwei Tang, Zeming Wang, Yu Wang, Yin Wang, Fuyou Liao, Jingyi Ma, Xiaojiao Guo, Ling Tong, Hanqi Liu, Hao Liu, Tianxiang Wu, Jiaxin Cao, Sitong Bu, Hui Shen, Fuyu Bai, Daming Huang, Jianan Deng, Antoine Riaud, Zihan Xu, Chenjian Wu, Shiwei Xing, Ye Lu, Shunli Ma, Zhengzong Sun, Zhongyin Xue, Zengfeng Di, Xiao Gong, David Wei Zhang, Peng Zhou, Jing Wan, Wenzhong Bao   +33 more
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Technology independent optimization when implementing sparse systems of disjunctive normal forms of Boolean functions in ASIC

Informatika
Objectives. The problem of choosing the best methods and programs for circuit implementation as part of digital ASIC (Application-Specific Integrated Circuit) sparse systems of disjunctive normal forms (DNF) of completely defined Boolean functions is ...
P. N. Bibilo, S. N. Kardash
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Optimized Near-Zero Quantization Method for Flexible Memristor Based Neural Network

IEEE Access, 2018
Due to controllable conductance and non-volatility, flexible memristors are regarded as a key enabler for building artificial neural network (ANN)-based learning algorithms in flexible and wearable systems.
Jiawei Xu, Yuxiang Huan, Kunlong Yang, Yiqiang Zhan, Zhuo Zou, Li-Rong Zheng   +5 more
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Design of Low-power Consumption Front-end CMOS Chip Circuit for Boron Nitride Personal Dosimeter

Yuanzineng kexue jishu
In the context of radiation monitoring for occupational safety, personal dosimeters require highly sensitive and energy-efficient electronic interfaces.
LIU Zhan, LIU Haifeng, HE Gaokui, HUANG Xinyi, SUN Jiayu
doaj   +1 more source

ASIC Design at Home

J. Univers. Comput. Sci., 1996
JUCS - Journal of Universal Computer Science Volume Nr.
openaire   +2 more sources

Blood Sugar Level Monitoring [PDF]

Informacije MIDEM, 2020
R. Ražman, A. Sešek, J. Tasič, J. Trontelj   +3 more
doaj   +1 more source