Results 51 to 60 of about 92,024 (251)
Design of an ASIC Digital Clock Using VLSI Technology
We present the design of an Application Specific Integrated Circuit (ASIC) digital clock based on the 0.12 µm deep submicron technology node. The widths of the PMOS and NMOS transistors are 0.72 µm and 0.24 µm, respectively.
Kim Ho Yeap +5 more
doaj
Here, the authors demonstrate the application of machine learning to optimize the device fabrication process for wafer-scale 2D semiconductors, and eventually fabricate digital, analog, and optoelectrical circuits.
Xinyu Chen +33 more
doaj +1 more source
ABSTRACT Existing research examines the relationship between personal life shocks and financial well‐being primarily through the lens of objective markers of the individual's financial situation (e.g., liquidity). Little attention has been paid to the relative roles of these objective markers and more intuitive or affect‐based factors in how an ...
Jordan Bell +2 more
wiley +1 more source
Hardware and software status of QCDOC
QCDOC is a massively parallel supercomputer whose processing nodes are based on an application-specific integrated circuit (ASIC). This ASIC was custom-designed so that crucial lattice QCD kernels achieve an overall sustained performance of 50% on ...
A. Gara +23 more
core +1 more source
A New Strategy to Design Reconfigurable Rivest–Shamir–Adleman (RSA) Accelerators
A reconfigurable FPGA‐based RSA accelerator is proposed using compression‐based modular multipliers combined with pseudomoduli arithmetic. The approach maps modular exponentiation to low‐cost arithmetic domains and applies a correction stage, achieving significant improvements in delay, operating frequency, and delay–area efficiency compared with ...
Augusto C. B. Vassoler +4 more
wiley +1 more source
The article presents the trends of development of the banking and insurance markets of Russia and Ar- menia are presented. Processes of bank loans and pledge insurance under the loan are considered.
Arthur Volodyevich Poghosyan
doaj
A High performance and low cost hardware arcitecture for H.264 transform and quantization algorithms [PDF]
In this paper, we present a high performance and low cost hardware architecture for real-time implementation of forward transform and quantization and inverse transform and quantization algorithms used in H.264 / MPEG4 Part 10 video coding standard.
Hamzaoglu, Ilker +3 more
core +1 more source
Ketogenic diet for infantile epileptic spasms
Abstract Approximately half of all cases of Infantile Epileptic Spasms Syndrome (IESS) do not respond to vigabatrin and hormonal therapies. There is no clear consensus as to the second‐line therapy for IESS. Ketogenic diet (KD) has emerged as an effective treatment for certain drug‐resistant epilepsies and in many cases of IESS.
Morris H. Scantlebury +3 more
wiley +1 more source
A Low Power All-Digital PLL With −40dBc In-Band Fractional Spur Suppression for NB-IoT Applications
This paper proposes a low-power fractional-N all-digital PLL (ADPLL) for the narrow-band Internet-of-Things applications. Multi-step lock controlling and oscillator tuning word coarse prediction algorithms help to accelerate the locking process to less ...
Na Yan +6 more
doaj +1 more source
ABSTRACT Introduction Pathological complete response (pCR) after neoadjuvant chemotherapy is associated with improved prognosis in patients with triple‐negative breast cancer (TNBC). Differences in pathological response rates between the breast and axillary lymph nodes have prompted interest in understanding response patterns that may, in the future ...
Milena Martello Cristófalo +7 more
wiley +1 more source

