Results 141 to 150 of about 2,227 (178)
Some of the next articles are maybe not open access.
Dynamically Adapted Low Power ASIPs
2009New generations of embedded devices, following the trend found in personal computers, are becoming computationally powerful. A current embedded scenario presents a large amount of complex and heterogeneous functionalities, which have been forcing designers to create novel solutions to increase the performance of embedded processors while, at the same ...
Mateus B. Rutzig +2 more
openaire +1 more source
Automatic Generation of Memory Interfaces for ASIPs
International Journal of Embedded and Real-Time Communication Systems, 2010With the growing market for multi-processor system-on-chip (MPSoC) solutions, application-specific instruction-set processors (ASIPs) gain importance as they allow for a wide tradeoff between flexibility and efficiency in such a system. Their development is aided by architecture description languages (ADLs) supporting the automatic generation of ...
David Kammler +6 more
openaire +1 more source
Design of an ASIP IDEA crypto processor
2011 IEEE 2nd International Conference on Networked Embedded Systems for Enterprise Applications, 2011A New architecture is presented in this paper for International Data Encryption Algorithm based on Application Specific Instruction set Processors platform. Designing process is explained comprehensively for all the main components within the crypto processor core.
Reza Faghih Mirzaee, Mohammad Eshghi
openaire +1 more source
PEAS-III: an ASIP design environment
Proceedings 2000 International Conference on Computer Design, 2002In this paper, an architectural level processor design environment PEAS-III is proposed. Pipelined processors designed by this system can include multi-cycle operation, delayed branch and external interrupt. The data path and control logic of the processor are generated from the clock based micro-operation description of instructions. The ease of large
Makiko Itoh +6 more
openaire +1 more source
An ASIP design methodology for embedded systems
Proceedings of the seventh international workshop on Hardware/software codesign - CODES '99, 1999A well-known challenge during processor design is to obtain the best possible results for a typical target application domain that is generally described as a set of benchmarks. Obtaining the best possible result in turn becomes a complex tradeoff between the generality of the processor and the physical characteristics.
openaire +1 more source
Instruction set selection for ASIP design
Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450), 1999We describe an approach for application-specific processor design based on an extendible microprocessor core. Core-based design allows to derive application-specific instruction processors from a common base architecture with low non-recurring engineering cost.
openaire +1 more source
Fast Simulation of Pipeline in ASIP Simulators
2014 15th International Microprocessor Test and Verification Workshop, 2014A fast and accurate simulator of the newly designed application specific instruction-set processors is essential during processor development, testing, and verification as well as for software development. Instruction-set simulators are usually used at the early stages of the design.
openaire +1 more source
Matrix Approach for Analyzing n-Site Generalized ASIP Systems: PGF and Site Occupancy Probabilities
Mathematics, 2022Uri Yechiali +2 more
exaly
ASIPAMPIUM: An Efficient ASIP Generator for Low Power Applications
Electronics (Switzerland), 2023Alessandro Girardi +2 more
exaly