Results 201 to 210 of about 5,156 (265)
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On the control of asynchronous machines with races

IEEE Transactions on Automatic Control, 2003
The problem of eliminating the effects of critical races on asynchronous machines is considered in a control theoretic context. State feedback controllers that eliminate the effects of critical races are developed. The results include necessary and sufficient conditions for the existence of such controllers and algorithms for their design.
Thomas E. Murphy   +2 more
exaly   +2 more sources

Machine learning in an asynchronous machine

Conference Proceedings 1991 IEEE International Conference on Systems, Man, and Cybernetics, 2002
To give a broad view of machine learning, the authors describe the basic methods of learning and give examples of learning systems which illustrate these techniques. Some of the early research in the performance of machine learning systems is discussed.
J. Carter, J. Herath
openaire   +1 more source

Fault-Tolerant Asynchronous Sequential Machines

IEEE Transactions on Computers, 1974
A general design technique for achieving single fault-tolerant asynchronous sequential circuits is described. The design procedures apply over a large range of fault conditions and are extremely easy to use. Generally, less than three times the logic required for a single copy is needed to achieve single fault tolerance. In addition to fault tolerance,
Gary K. Maki, Dwight H. Sawin III
openaire   +2 more sources

Self-Synchronized Asynchronous Sequential Machines

IEEE Transactions on Computers, 1974
In this correspondence, a new circuit structure is proposed which basically supresses the possibility of hazards and critical races in asynchronous sequential machines. In contrast to many approaches which try to solve these problems by changing the form of the automaton model, we suggest a more general "hardware" solution.
Christian Rey, Jean G. Vaucher
openaire   +2 more sources

Fail-Safe Asynchronous Sequential Machines

IEEE Transactions on Computers, 1975
Fail-safe circuits are designed to assume a 1 (1-fail-safe) or a 0 (0-fail-safe) output state upon failure. This correspondence extends fault detection techniques previously presented [1] to include the design of fail-safe asynchronous sequential circuits.
Dwight H. Sawin III, Gary K. Maki
openaire   +2 more sources

Asynchronous Abstract Machines

Proceedings of the 9th International Workshop on Runtime and Operating Systems for Supercomputers, 2019
Today's systems offer an increasing number of processor cores, however, the chance to operate them efficiently by dedicating cores to specific tasks is often missed. Instead, mixed workloads are processed by each core which leads to system noise (i.e., interferences, scheduling overheads) and yields subpar performance, only.
Sebastian Maier   +3 more
openaire   +1 more source

A Fail-Safe Asynchronous Sequential Machine

IEEE Transactions on Computers, 1974
This paper examines the dynamic fault behavior of asynchronous sequential machines, specifically identifying the faults which cause critical races and hazards, and presents a state assignment technique leading to a machine that enters one of a small set of error states whenever a fault occurs.
William W. Patterson, Gernot Metze
openaire   +1 more source

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