Results 231 to 240 of about 77,225 (286)

MODELING OF ASYNCHRONOUS MACHINE

CAD/EDA, MODELING AND SIMULATION IN MODERN ELECTRONICS: COLLECTION OF SCIENTIFIC PAPERS OF THE III INTERNATIONAL SCIENTIFIC AND PRACTICAL CONFERENCE, 2019
This paper presents a mathematical model of a generalized asynchronous machine and its modeling in MATLAB ...
Anatoliy Afanasyev, Evgeniya Studneva
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Fail-Safe Asynchronous Sequential Machines

IEEE Transactions on Computers, 1975
Fail-safe circuits are designed to assume a 1 (1-fail-safe) or a 0 (0-fail-safe) output state upon failure. This correspondence extends fault detection techniques previously presented [1] to include the design of fail-safe asynchronous sequential circuits.
Dwight H. Sawin III, Gary K. Maki
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A Fail-Safe Asynchronous Sequential Machine

IEEE Transactions on Computers, 1974
This paper examines the dynamic fault behavior of asynchronous sequential machines, specifically identifying the faults which cause critical races and hazards, and presents a state assignment technique leading to a machine that enters one of a small set of error states whenever a fault occurs.
William W. Patterson, Gernot Metze
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Synthesis of 3D asynchronous state machines

Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors, 2003
A synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple-input-change fundamental mode operation, is described. This implementation of burst-mode state machines uses standard combinational logic, generates low-latency outputs and guarantees freedom from hazards at the gate ...
Kenneth Y. Yun, David L. Dill, Steven M. Nowick   +2 more
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Synthesis-for-initializability of asynchronous sequential machines

Proceedings International Test Conference 1996. Test and Design Validity, 2002
We present a new method for the synthesis-for initializability of asynchronous state machines. Unlike existing approaches, our method incorporates a state assignment step. State assignment is critical, since initializability may be precluded by poor choice of state assignment. Also, we present precise conditions on hazard-free logic, to insure that the
Montek Singh, Steven M. Nowick
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A Continuous-Time Asynchronous Boltzmann Machine

Neural Networks, 1997
We propose an asynchronous neural network model having the same structure as the binary Hopfield model. Each neuron operates with continuous time and randomly changes its state according only to its membrane potential. The proposed model settles in a steady-state fluctuation, in which the probability distribution of the global state is identical to ...
Kazuo Yamanaka, Masahiro Agu, Teruyuki Miyajima   +2 more
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RESEARCH OF A SYNCHRONIZED ASYNCHRONOUS MACHINE

2023
Recently, interest in synchronized asynchronous machines has been growing more and more. A synchronized asynchronous machine is a conventional wound-rotor induction machine, two or three phase windings of which are supplied with direct current. The article presents a diagram of a synchronized asynchronous machine.
Mammadov, N.S., Nasibov, Q.A.
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State Assignments for Asynchronous Sequential Machines

IEEE Transactions on Computers, 1971
In this paper, a heuristic state assignment algorithm for asynchronous sequential machines is presented. Machines realized by this assignment scheme will result in circuits having a small amount of gate inputs and operating in single transition time. It is also shown that for a flow table having m 1 input columns, m input variables, and d stable states,
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Modelling and identification of the asynchronous machine

First International Symposium on Control, Communications and Signal Processing, 2004., 2004
In order to identify an asynchronous machine by a fuzzy controller while using the method of STREJC, it is necessary to mention that the establishment of a mathematical model of asynchronous machine which the complexity and the no linearity have been reduced in return for a certain number of simplifying hypotheses and while applying the transformation ...
M. Khemliche, S. Latreche, A. Khellaf
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Asynchronous Sequential Machines Designed for Fault Detection

IEEE Transactions on Computers, 1974
A design procedure is presented which allows for detection of faults in asynchronous sequential machines in a real time environment. Faults affecting both the output states and the internal operation of the machine are detected. The class of faults initially considered are single stuck-at-1 and stuck-at-0 faults.
Dwight H. Sawin III, Gary K. Maki
openaire   +1 more source