Results 141 to 150 of about 13,901 (202)
Subtractive Microfluidics in CMOS. [PDF]
Tech Dig Int Electron Devices MeetWeng WY +5 more
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IEEE Journal of Solid-State Circuits, 1988
A high-performance BiCMOS technology (Hi-BiCMOS) and its applications to VLSIs are described. By combining bipolar and CMOS devices in unit circuits of VLSIs, Hi-BiCMOS provides both speed performance competitive with bipolar LSIs and integration density close to that of CMOS LSIs.
M. Kubo, I. Masuda, K. Miyata, K. Ogiue
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A high-performance BiCMOS technology (Hi-BiCMOS) and its applications to VLSIs are described. By combining bipolar and CMOS devices in unit circuits of VLSIs, Hi-BiCMOS provides both speed performance competitive with bipolar LSIs and integration density close to that of CMOS LSIs.
M. Kubo, I. Masuda, K. Miyata, K. Ogiue
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BiCMOS domino: a novel high-speed dynamic BiCMOS logic
International Journal of Electronics, 1997A new BiCMOS dynamic logic family is presented. The logic gates provide a significant speed-up over existing logic families, such as, CMOS, BiCMOS and dynamic CMOS for the same feature size. The proposed logic family provides a high drive capability to drive large loads at higher speeds compared with the CMOS domino logic family.
SANKARAN M. MENON +2 more
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IBM Journal of Research and Development, 2002
Silicon technology development is at a crossroads, following an exponential rate of progress for more than thirty years. While CMOS (complementary metal-oxide-semiconductor) will remain the backbone of digital logic, silicon technology will evolve in directions driven by system needs that are not met by CMOS alone.
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Silicon technology development is at a crossroads, following an exponential rate of progress for more than thirty years. While CMOS (complementary metal-oxide-semiconductor) will remain the backbone of digital logic, silicon technology will evolve in directions driven by system needs that are not met by CMOS alone.
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1994
With the anticipated growth of BiCMOS technology for high-performance ASIC design, the issue of testing takes on great significance. This paper addresses the testing of BiCMOS logic circuits. Since many different implementations of BiCMOS gates have been proposed, four representative ones are studied.
M.E. Levitt, K. Roy, J.A. Abraham
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With the anticipated growth of BiCMOS technology for high-performance ASIC design, the issue of testing takes on great significance. This paper addresses the testing of BiCMOS logic circuits. Since many different implementations of BiCMOS gates have been proposed, four representative ones are studied.
M.E. Levitt, K. Roy, J.A. Abraham
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Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2002
An advanced BiCMOS technology is used to build transceivers that provide incident edge switching on a Futurebus backplane with max prop delay time of 3 ns, and standby Icc of less than 4 mA. A Schottky diode between the driving transistor and the pad is reverse-biased so that pin capacitance is kept below 5 pf to minimize backplane loading.
T. Fletcher, E. Hahn, J. West
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An advanced BiCMOS technology is used to build transceivers that provide incident edge switching on a Futurebus backplane with max prop delay time of 3 ns, and standby Icc of less than 4 mA. A Schottky diode between the driving transistor and the pad is reverse-biased so that pin capacitance is kept below 5 pf to minimize backplane loading.
T. Fletcher, E. Hahn, J. West
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European Transactions on Telecommunications, 1990
AbstractThis paper describes why and how BICMOS technology will be one of the top three technology stars of the next decade. After a presentation of the specific advantages and drawback5 of Bipolar and CMOS technologies, the exploitation of characteristics of both components. realized on the same chip, is discussed.
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AbstractThis paper describes why and how BICMOS technology will be one of the top three technology stars of the next decade. After a presentation of the specific advantages and drawback5 of Bipolar and CMOS technologies, the exploitation of characteristics of both components. realized on the same chip, is discussed.
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[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems, 2003
Design issues associated with developing an analog BiCMOS process technology are reviewed. This information is then highlighted with an example of BiCMOS process stressing modularity and component diversity. Future technology issues for next-generation processes are discussed. >
L. Hutter, J. Smith, J. Goon
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Design issues associated with developing an analog BiCMOS process technology are reviewed. This information is then highlighted with an example of BiCMOS process stressing modularity and component diversity. Future technology issues for next-generation processes are discussed. >
L. Hutter, J. Smith, J. Goon
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Proceedings., Second Annual IEEE ASIC Seminar and Exhibit, 2003
The objective of Hi-BiCMOS is to combine speed performance approaching that of ECL and integration density approaching that of CMOS. A high-performance 1.3- mu m BiCMOS technology and its applications to ASICs (application-specific integrated circuits) are described. This Hi-BiCMOS gate array contains 3072 gates and 90 input/output buffers.
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The objective of Hi-BiCMOS is to combine speed performance approaching that of ECL and integration density approaching that of CMOS. A high-performance 1.3- mu m BiCMOS technology and its applications to ASICs (application-specific integrated circuits) are described. This Hi-BiCMOS gate array contains 3072 gates and 90 input/output buffers.
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