Results 41 to 50 of about 132,994 (259)

THE IMPACT ANALYSIS OF PREFETCH IN THE CACHE ON THE MICROPROCESSOR PERFORMANCE

open access: yesРоссийский технологический журнал, 2016
Memory access delay has been a major influence on microprocessor systems performance recently. On-chip cache memory application dramatically reduces this delay.
B. Z. Shmeylin
doaj   +1 more source

Striping Input Feature Map Cache for Reducing off-chip Memory Traffic in CNN Accelerators

open access: yesTelfor Journal, 2020
Data movement between the Convolutional Neural Network (CNN) accelerators and off-chip memory is critical concerning the overall power consumption. Minimizing power consumption is particularly important for low power embedded applications.
R. Struharik, V. Vranjkovic
doaj   +1 more source

Stochastic Modeling of Hybrid Cache Systems

open access: yes, 2016
In recent years, there is an increasing demand of big memory systems so to perform large scale data analytics. Since DRAM memories are expensive, some researchers are suggesting to use other memory systems such as non-volatile memory (NVM) technology to ...
Chen, Jiqiang   +4 more
core   +1 more source

Weakly Secure Coded Caching Scheme for an Eavesdropper Having Prior Knowledge

open access: yesIEEE Access, 2020
Coded caching is a promising method for solving caching problems in content-centric wireless networks. To enhance the security of coded caching for practical purposes, this paper investigates a secure coded caching scheme for defending against an ...
Nan Wang, Hai Zhao, Haibo Jin, Long Hai
doaj   +1 more source

LERC: Coordinated Cache Management for Data-Parallel Systems

open access: yes, 2017
Memory caches are being aggressively used in today's data-parallel frameworks such as Spark, Tez and Storm. By caching input and intermediate data in memory, compute tasks can witness speedup by orders of magnitude.
Letaief, Khaled B.   +3 more
core   +1 more source

Cache memory for Prolog stack

open access: yesElectronics Letters, 1989
Traditional cache memory organisations base their usefulness on the locality of reference which characterises the memory behaviour of most programs. In a cache which has been specifically designed to support a given programming language, however, we can take advantage of a more precise knowledge of the characteristics of the memory behaviour of ...
LAZZERINI, BEATRICE, LOPRIORE, LANFRANCO
openaire   +4 more sources

Electrode and Microstructure Dependence of Oxygen Diffusion in Ferroelectric Hafnium Zirconium Oxide Thin Films

open access: yesAdvanced Functional Materials, EarlyView.
Significant nanoscale oxygen diffusion coefficient variations are measured in ferroelectric hafnium zirconium oxide films with grain boundaries and electrode interfaces exhibiting values 104 times larger than the grain cores. Overall coefficients are 10X larger for films prepared with metal nitride electrodes compared to refractory metals. New insights
Liron Shvilberg   +6 more
wiley   +1 more source

Cache-Oblivious Persistence

open access: yes, 2014
Partial persistence is a general transformation that takes a data structure and allows queries to be executed on any past state of the structure. The cache-oblivious model is the leading model of a modern multi-level memory hierarchy.We present the first
A. Fiat   +10 more
core   +1 more source

Multiobjective Codesign Optimization of a Planar Pneumatic Artificial Muscle‐Based Snake‐Like Robot for Enhanced Agility and Energy Efficiency

open access: yesAdvanced Robotics Research, EarlyView.
A codesign multiobjective optimization framework was developed to enhance the morphology and controller of a snake‐like robot driven by artificial muscles. It improved planar locomotion, agility, and power efficiency. The approach optimized link geometry and controller gains, revealing that shorter muscles near joints and longer linkages maximize ...
Ayla Valles, Mahdi Haghshenas‐Jaryani
wiley   +1 more source

Design and Implementation of SIMD Unaligned Memory Access Structure [PDF]

open access: yesJisuanji gongcheng, 2016
Single Instruction Multiple Data(SIMD) is an effective approach to realize data level parallelism,but accessing unaligned data seriously affects vectorization of the program and causes processor performance degradation.In order to reduce the latency of ...
YU Chenglong,WANG Yongwen
doaj   +1 more source

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