Results 21 to 30 of about 1,837,572 (294)
MALEC: a multiple access low energy cache [PDF]
, 2013 This paper addresses the dynamic energy consumption in L1 data cache interfaces of out-of-order superscalar processors. The proposed Multiple Access Low Energy Cache (MALEC) is based on the observation that consecutive memory references tend to access ...
Kershaw, Danny +3 more
core +2 more sources
Decision Tree-Based Adaptive Reconfigurable Cache Scheme
Algorithms, 2021 Applications have different preferences for caches, sometimes even within the different running phases. Caches with fixed parameters may compromise the performance of a system.
Wei Zhu, Xiaoyang Zeng
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Modelling and Performance Analysis of Cache Networks. [PDF]
, 1999 This paper develops and implements a World Wide Web cache infrastructure model which is to be used for analysis of features that are otherwise difficult to get from existing log data or for evaluation of nonexisting cache scenarios.
Olafsson, Sverrir +3 more
core +4 more sources
IOb-Cache: A High-Performance Configurable Open-Source Cache
Algorithms, 2021 Open-source processors are increasingly being adopted by the industry, which requires all sorts of open-source implementations of peripherals and other system-on-chip modules.
João V. Roque +3 more
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Software-Based Self-Test of Set-Associative Cache Memories [PDF]
, 2011 Embedded microprocessor cache memories suffer from limited observability and controllability creating problems during in-system tests. This paper presents a procedure to transform traditional march tests into software-based self-test programs for set ...
Stefano Di Carlo +5 more
core +1 more source
WWW Cache Modelling Toolbox. [PDF]
, 1999 This paper develops and implements a World Wide Web cache infrastructure model which is to be used for analysis of features that are otherwise difficult to get from existing log data or for evaluation of nonexisting cache scenarios.
Olafsson, Sverrir +3 more
core +4 more sources
Cache miss analysis of WHT algorithms [PDF]
Discrete Mathematics & Theoretical Computer Science, 2005 On modern computers memory access patterns and cache utilization are as important, if not more important, than operation count in obtaining high-performance implementations of algorithms.
Mihai Furis +2 more
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MESI Cache Coherence Simulator for Teaching Purposes
CLEI Electronic Journal, 2009 Nowadays, the computational systems (multi and uniprocessors) need to avoid the cache coherence problem. There are some techniques to solve this problem. The MESI cache coherence protocol is one of them.
Juan Gómez-Luna +2 more
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IEEE Access, 2021 Monolithic 3D (M3D) integration has been emerged as a promising technology for fine-grained 3D stacking. As the M3D integration offers extremely small dimension of via in a nanometer-scale, it is beneficial for small microarchitectural blocks such as ...
Young-Ho Gong
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Системный анализ и прикладная информатика, 2019 Caches are intermediate level between fast CPU and slow main memory. It aims to store copies of frequently used data and to reduce the access time to the main memory.
A. A. Prihozhy
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