Results 11 to 20 of about 132,994 (259)
Decision Tree-Based Adaptive Reconfigurable Cache Scheme
Algorithms, 2021 Applications have different preferences for caches, sometimes even within the different running phases. Caches with fixed parameters may compromise the performance of a system.
Wei Zhu, Xiaoyang Zeng
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Cache miss analysis of WHT algorithms [PDF]
Discrete Mathematics & Theoretical Computer Science, 2005 On modern computers memory access patterns and cache utilization are as important, if not more important, than operation count in obtaining high-performance implementations of algorithms.
Mihai Furis +2 more
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IOb-Cache: A High-Performance Configurable Open-Source Cache
Algorithms, 2021 Open-source processors are increasingly being adopted by the industry, which requires all sorts of open-source implementations of peripherals and other system-on-chip modules.
João V. Roque +3 more
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, 2005 Cache memories are commonly implemented through multiple memory banks to improve bandwidth and latency. The early knowledge of the data cache bank that an instruction will access can help to improve the performance in several ways.
Bieschewski, Stefan +2 more
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IEEE Access, 2021 Monolithic 3D (M3D) integration has been emerged as a promising technology for fine-grained 3D stacking. As the M3D integration offers extremely small dimension of via in a nanometer-scale, it is beneficial for small microarchitectural blocks such as ...
Young-Ho Gong
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Randomized cache placement for eliminating conflicts [PDF]
, 1999 Applications with regular patterns of memory access can experience high levels of cache conflict misses. In shared-memory multiprocessors conflict misses can be increased significantly by the data transpositions required for parallelization.
González Colás, Antonio María +1 more
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Accelerator Memory Reuse in the Dark Silicon Era [PDF]
, 2014 Accelerators integrated on-die with General-Purpose CPUs (GP-CPUs) can yield significant performance and power improvements. Their extensive use, however, is ultimately limited by their area overhead; due to their high degree of specialization, the ...
Carloni, L.P. +4 more
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MESI Cache Coherence Simulator for Teaching Purposes
CLEI Electronic Journal, 2009 Nowadays, the computational systems (multi and uniprocessors) need to avoid the cache coherence problem. There are some techniques to solve this problem. The MESI cache coherence protocol is one of them.
Juan Gómez-Luna +2 more
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Системный анализ и прикладная информатика, 2019 Caches are intermediate level between fast CPU and slow main memory. It aims to store copies of frequently used data and to reduce the access time to the main memory.
A. A. Prihozhy
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In-Memory Caching for Enhancing Subgraph Accessibility
Applied Sciences, 2020 Graphs have been utilized in various fields because of the development of social media and mobile devices. Various studies have also been conducted on caching techniques to reduce input and output costs when processing a large amount of graph data.
Kyoungsoo Bok +4 more
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