Results 11 to 20 of about 6,716 (257)

Don't make cache too complex: A simple probability-based cache management scheme for SSDs. [PDF]

open access: yesPLoS ONE, 2017
Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies.
Seungjae Baek   +2 more
doaj   +1 more source

Decision Tree-Based Adaptive Reconfigurable Cache Scheme

open access: yesAlgorithms, 2021
Applications have different preferences for caches, sometimes even within the different running phases. Caches with fixed parameters may compromise the performance of a system.
Wei Zhu, Xiaoyang Zeng
doaj   +1 more source

IOb-Cache: A High-Performance Configurable Open-Source Cache

open access: yesAlgorithms, 2021
Open-source processors are increasingly being adopted by the industry, which requires all sorts of open-source implementations of peripherals and other system-on-chip modules.
João V. Roque   +3 more
doaj   +1 more source

Cache miss analysis of WHT algorithms [PDF]

open access: yesDiscrete Mathematics & Theoretical Computer Science, 2005
On modern computers memory access patterns and cache utilization are as important, if not more important, than operation count in obtaining high-performance implementations of algorithms.
Mihai Furis   +2 more
doaj   +1 more source

MESI Cache Coherence Simulator for Teaching Purposes

open access: yesCLEI Electronic Journal, 2009
Nowadays, the computational systems (multi and uniprocessors) need to avoid the cache coherence problem. There are some techniques to solve this problem. The MESI cache coherence protocol is one of them.
Juan Gómez-Luna   +2 more
doaj   +1 more source

Monolithic 3D-Based SRAM/MRAM Hybrid Memory for an Energy-Efficient Unified L2 TLB-Cache Architecture

open access: yesIEEE Access, 2021
Monolithic 3D (M3D) integration has been emerged as a promising technology for fine-grained 3D stacking. As the M3D integration offers extremely small dimension of via in a nanometer-scale, it is beneficial for small microarchitectural blocks such as ...
Young-Ho Gong
doaj   +1 more source

Simulation of direct mapped, k-way and fully associative cache on all pairs shortest paths algorithms

open access: yesСистемный анализ и прикладная информатика, 2019
Caches are intermediate level between fast CPU and slow main memory. It aims to store copies of frequently used data and to reduce the access time to the main memory.
A. A. Prihozhy
doaj   +1 more source

An Effective Burst Access Scheme for Lossless Frame Buffer Compression on a Video Decoder

open access: yesIEEE Access, 2021
For decoding high-resolution image stored in external memory after lossless compression, it is inevitable necessary to allow variable-length data types and this may decreases the efficiency in real time read of arbitrary compressed macro block without ...
Jaeshin Lee   +4 more
doaj   +1 more source

In-Memory Caching for Enhancing Subgraph Accessibility

open access: yesApplied Sciences, 2020
Graphs have been utilized in various fields because of the development of social media and mobile devices. Various studies have also been conducted on caching techniques to reduce input and output costs when processing a large amount of graph data.
Kyoungsoo Bok   +4 more
doaj   +1 more source

A Heterogeneity-Aware Replacement Policy for the Partitioned Cache on Asymmetric Multi-Core Architectures

open access: yesMicromachines, 2022
In an asymmetric multi-core architecture, multiple heterogeneous cores share the last-level cache (LLC). Due to the different memory access requirements among heterogeneous cores, the LLC competition is more intense.
Juan Fang   +4 more
doaj   +1 more source

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