A Case for MLP-Aware Cache Replacement [PDF]
33rd International Symposium on Computer Architecture (ISCA'06), 2006 Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache misses in parallel is called Memory Level Parallelism (MLP). MLP is not uniform across cache misses - some misses occur in isolation while some occur in parallel with other ...
Moinuddin K. Qureshi +3 more
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Cache replacement strategy based on content value
Dianxin kexue, 2018 The cache replacement mechanism is one of the important research issues of the content center network.Considering the limited cache space,the reasonable replacement of the cache content becomes a key factor affecting the overall performance of the ...
Dan HUANG, Rongfang SONG
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Near-optimal loop tiling by means of cache miss equations and genetic algorithms [PDF]
, 2002 The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transformations such as loop tiling, which is a code transformation targeted to ...
Abella Ferrer, Jaume +3 more
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Timing predictability of cache replacement policies [PDF]
Real-Time Systems, 2007 zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Jan Reineke 0001 +3 more
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Cache Strategy Based on Dynamic Popularity and Request Cost in Named Data Networking [PDF]
Jisuanji gongcheng, 2018 In order to replacing cache efficiently in Named Data Networking(NDN),a cache replacement strategy combining dynamic popularity and cost cache replacement policy is proposed in this paper,which named DPCP.Each node calculates the Dynamic Popularity and ...
GUO Chen,ZHENG Quan,DING Yao,WANG Song
doaj
Linux kernel compaction through cold code swapping [PDF]
, 2009 There is a growing trend to use general-purpose operating systems like Linux in embedded systems. Previous research focused on using compaction and specialization techniques to adapt a general-purpose OS to the memory-constrained environment, presented ...
A. Milanova +13 more
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Two novel cache management mechanisms on CPU-GPU heterogeneous processors
Research Briefs on Information & Communication Technology Evolution, 2021 Heterogeneous multicore processors that take full advantage of CPUs and GPUs within the same chip raise an emerging challenge for sharing a series of on-chip resources, particularly Last-Level Cache (LLC) resources.
Huijing Yang, Tingwen Yu
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Adapting cache partitioning algorithms to pseudo-LRU replacement policies [PDF]
, 2010 Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors.
Cazorla, Francisco +3 more
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Adaptive Neuro-fuzzy Inference System as Cache Memory Replacement Policy
Advances in Electrical and Computer Engineering, 2014 To date, no cache memory replacement policy that can perform efficiently for all types of workloads is yet available. Replacement policies used in level 1 cache memory may not be suitable in level 2.
CHUNG, Y. M., HALIM, Z. A.
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Adapting ACME to the database caching environment : a thesis presented in partial fulfilment of the requirements for the degree of Master of Science in Information Systems at Massey University [PDF]
, 2003 The field of database cache replacement has seen a great many replacement policies presented in the past few years. As the challenge to find the optimal replacement policy continues, new methods and techniques of determining cache victims have been ...
Riaz-ud-Din, Faizal
core