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A-RAM: Novel capacitor-less DRAM memory

2009 IEEE International SOI Conference, 2009
A totally different capacitor-less, single-transistor memory cell (1T-DRAM) is proposed and documented. Its novelty comes from the body partitioning in two distinct regions, where electrons and holes are respectively confined. As compared to earlier 1T-DRAMs, the coexistence and coupling of electrons and holes is maintained even in ultrathin fully ...
Noel Rodriguez   +2 more
openaire   +1 more source

Output-Capacitor-Less LDO with High PSR

2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2019
A low-dropout regulator (LDO) with high power supply ripple rejection (PSR) and capacitor-free is presented in this paper. The LDO proposes a PSR enhancement module based on the analysis of the power supply noise transmission path. It uses the Q-reduction circuit to reduce the required on-chip capacitor and the load on the minimum required output.
Yue Zhang   +3 more
openaire   +1 more source

A SOI capacitor-less 1T-DRAM concept

2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207), 2002
A simple 1T DRAM cell concept is proposed for the first time. It exploits the body charging of PD SOI devices to store the information. This cell is at least two times smaller in area than the conventional 1T/1C DRAM cell and does not require the integration of a storage capacitor.
S. Okhonin   +3 more
openaire   +1 more source

Three-Phase DC Capacitor-Less Solid-State Variable Capacitor

2020 IEEE Energy Conversion Congress and Exposition (ECCE), 2020
Grid-connected full bridge inverters typically have a bulky electrolytic dc capacitor to absorb the unbalanced power from the ac side. The electrolytic capacitors are vulnerable and normally have shorter lifetime than other components in the converter.
Yunting Liu   +3 more
openaire   +1 more source

Inverter-Based Fast Transient Response Capacitor-Less LDO

2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2019
This paper proposes a fully integrated low dropout regulator (LDO) with fast transient response capability without the need of external off-chip capacitors. Based on the traditional LDO, two inverters are inserted between the gate of the PMOS and the output stage of the error amplifier.
Jiaojin Shi   +5 more
openaire   +1 more source

Capacitor-less memory: Advances and challenges

2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2016
Several types of floating-body capacitorless 1TD-RAM memory cells are reviewed and compared. We focus on the recently proposed concepts (MSDRAM, A2RAM and Z2FET), by addressing the device architecture and fabrication, operating mechanisms, and scaling issues.
openaire   +1 more source

A Capacitor-less Low Drop out Voltage Regulator

2010 INTERNATIONAL CONFERENCE ON COMMUNICATION CONTROL AND COMPUTING TECHNOLOGIES, 2010
Low dropout voltage regulators (LDO) use a large external capacitor, in the range of few micro-farads. These external capacitors occupy valuable board space, increase the IC pin count and prohibit System-On-Chip (SoC) solutions. The large external capacitor is replaced with a reasonable 1nF internal capacitor.
Sunita Shirahatti   +2 more
openaire   +1 more source

Inductor-less, capacitor-less state-variable electrothermal filters

IEEE Journal of Solid-State Circuits, 1977
Electrothermal circuits (ETC) exploit interactions between thermal and electronic properties of devices in an integrated circuit to perform useful electronic functions. An ETC integrator is described which can be used as a building block for state-variable filters.
W.J. Louw, D.J. Hamilton, W.J. Kerwin
openaire   +1 more source

Capacitor-less D-STATCOM for reactive power compensation

2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG 2018), 2018
This paper presents a D-STATCOM for reactive power compensation in a distribution system that uses inductive energy storage element connected to the grid via a matrix converter (MC). The MC is controlled using model predictive controller (MPC) technique. The D-STATCOM will provide load compensation without using electrolytic capacitors.
Wesam Rohouma   +3 more
openaire   +1 more source

Novel Capacitor-Less 1T-DRAM Using MSD Effect

2006 IEEE international SOI Conferencee Proceedings, 2006
In this paper, we propose a different single-transistor capacitor-less DRAM which is operated at low drain voltage and enables low-power applications. The basic mechanism is the meta-stable dip (MSD) effect recently discovered (Bawedin et al., 2004, 2005). MSD gives rise to a hysteresis in ID(VG) curves and a dip in transconductance gm.
M. Bawedin, S. Cristoloveanu, D. Flandre
openaire   +1 more source

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