Results 251 to 260 of about 54,421 (264)

Wafer-Level Chip-Scale Packaging

2015
Shichun Qu, Yong Liu
openaire   +1 more source

Chip Scale Package

2016
openaire   +1 more source

Chip Scale Packaging for Modern Electronics

Soldering & Surface Mount Technology, 2003
openaire   +1 more source

Chip scale package

2002
openaire   +1 more source

Integrated chip scale packages

2019
openaire   +2 more sources

Chip and Package-Scale Interconnects for General-Purpose, Domain-Specific, and Quantum Computing Systems—Overview, Challenges, and Opportunities

IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Partha Pande, Maurizio Palesi
exaly  

Multilayer chip scale package

2011
openaire   +1 more source

Drop failure modes of Sn–3.0Ag–0.5Cu solder joints in wafer level chip scale package

Transactions of Nonferrous Metals Society of China, 2016
exaly  

Method for forming chip scale package

2001
ELENIUS PETER, HOLLACK HARRY
openaire   +2 more sources

8-inch GaN on Si-based wafer-level chip-scale package (Conference Presentation)

2017
exaly