Results 191 to 200 of about 227,711 (205)

Clock Gating — A Power Optimizing Technique for VLSI Circuits

2011
Jitesh Shinde
exaly  

Design Flow for Flip-Flop Grouping in Data-Driven Clock Gating

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014
Shmuel Wimer, Israel Koren
exaly  

Complex Clock Gating With Integrated Clock Gating Logic Cell

2007
Yiannos Manoli
exaly  

A Look-Ahead Clock Gating Based on Auto-Gated Flip-Flops

IEEE Transactions on Circuits and Systems I: Regular Papers, 2014
Shmuel Wimer
exaly  

Clock Gating Techniques: An Overview

2018
N Shanmugasundaram
exaly  

Adaptive Clock Gating Technique for Low Power IP Core in SoC Design

2007
Zhimin Zhang
exaly  

Timing Optimization in Sequential Circuit by Exploiting Clock-Gating Logic

ACM Transactions on Design Automation of Electronic Systems, 2012
exaly  

The Merged Clock Gating Architecture for Low Power Digital Clock Application on FPGA

2018
exaly  

Clock Gating and Negative Edge Triggering for Energy Recovery Clock

2007
Hamid Mahmoodi
exaly  

Automatic Register Transfer Level CAD Tool Design for Advanced Clock Gating and Low Power Schemes

2012
Yunlong Zhang, Ken Choi, Qiang Tong
exaly