Results 161 to 170 of about 567,761 (300)

From Sensing Mechanisms to System Co‐Design: Graphene‐Based Sensors and Readout Circuits

Advanced Science, EarlyView.
This review establishes a unified PS–EQ–RF framework linking graphene sensing mechanisms, native electrical outputs, and output‐specific readout circuits. Voltage‐, current‐, resistance‐, and capacitance‐type sensing systems are systematically classified to guide architecture selection, low‐noise design, system co‐design, and practical integration ...
Jinduo Zhang, Meng Chen, Guanchen Li, Ruifeng Liu, Yingxin Wang, Ziran Zhao   +5 more
wiley   +1 more source

CMOS multifunctional programmable metachip for terahertz-integrated sensing and communication. [PDF]

Sci Adv
Shen Z, Guo K, Wu J, Fan K, Jing H, Deng H, Tian X, Jin B, You X, Zhao D.   +9 more
europepmc   +1 more source

High speed CMOS vision chips

, 2011
This paper presents novel high speed vision chips based on multiple levels of parallel processors. The chip integrates CMOS image sensor, multiple-levels of SIMD parallel processors and an embedded microprocessor unit.
Wu, N.(nanjian@red.semi.ac.cn), Wu, Nanjian   +1 more
core  

A Reconfigurable Memristive Spiking Neuron Enabling Advanced Neuromorphic Computing

Advanced Science, EarlyView.
Pek Jun Tiw and co‐workers develop a reconfigurable memristive neuron that can exhibit four spiking behaviors with freely tunable spike train parameters. The neuron supports multiplexed spike encoding of multiple pieces of information. It also supports advanced neural network strategies, such as neural heterogeneity and dynamic mode switching ...
Pek Jun Tiw, Yuqi Li, Zhongyuan Li, Qihang Ding, Yuzhe Wang, Jiarong Wang, Yuchao Yang   +6 more
wiley   +1 more source

Megapixel snapshot hyperspectral imaging with high resolution Fabry-Pérot color filter array. [PDF]

Natl Sci Rev
Chen Y, Huang J, Hu Z, Rong R, Ma Q, Zeng P, Chen J, Tam H, Deng J, Li K, Cheah K, Li G.   +11 more
europepmc   +1 more source

Triple‐Level Content‐Addressable Vertical NAND Flash Memory

Advanced Science, EarlyView.
Commercial triple‐level‐cell V‐NAND flash memory is transformed into a compact content‐addressable memory by directly exploiting its eight threshold‐voltage states. A parity‐split search scheme preserves storage density while enabling reliable multi‐level and don't‐care matching. Parallel word‐line search delivers up to 24‐fold higher throughput and 54.
Sung‐Ho Park, Jiseong Im, Yeongheon Yang, Ryun‐Han Koo, Jonghyun Ko, Mingyun Oh, Dongbeen Shin, Gyuweon Jung, Jong‐Ho Lee   +8 more
wiley   +1 more source

A 1.0 V V_DD CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25 μm CMOS process

, 2002
A 128×128 complementary CMOS active-pixel sensor (CAPS) is fabricated in 0.25 μm CMOS for low-voltage application. A single-slope with correlated double sampling (CDS) is used in the readout circuit.
Chan, Mansun, Xu, Chen, Zhang, Weiquan
core  

Numerical Characterization of Optical Transmittance Through Planar Multilayer Dielectric Stacks on CMOS Photodiodes. [PDF]

Sensors (Basel)
Fernandes J, Ferreira GM, Carmo JP, Minas G, Catarino SO.   +4 more
europepmc   +1 more source

Nickel Intercalation in Epitaxial Graphene on SiC(0001): A Novel Platform for Engineering Two‐Dimensional Heterostructures

Advanced Science, EarlyView.
Ni‐intercalated graphene on SiC is achieved through a scalable colloidal nanoparticle deposition route. 2D heterostructures show preserved graphene band structure, stable under ambient conditions, and robust interfacial magnetism. Intercalated 2D Ni represents a promising candidate for next‐generation spintronic devices and is a scalable pathway to ...
Ylea Vlamidis, Stiven Forti, Antonio Rossi, Arrigo Calzolari, Carmela Marinelli, Camilla Coletti, Stefan Heun, Stefano Veronesi   +7 more
wiley   +1 more source

A Programmable Delay Line-Based Measurement Methodology for CMOS LiDAR Receivers. [PDF]

Micromachines (Basel)
Seo B, Lee S, Park S, Park SM.
europepmc   +1 more source