Results 31 to 40 of about 407,225 (353)
Dynamic Power Consumption In CMOS N Bit Full-Adder Circuit [PDF]
Engineering and Technology Journal, 2021 This paper discusses power consumption in the full adder circuit using some fabrication technologies. Though many studies related to power consumption in the full adder circuit were performed, however, few investigations about the effect of the number of
Amal Hasan, Qusay Al-Doori
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HeliyonIn this work, we introduce an enhanced Finite Volume Method (FVM) designed for the quasi-electrostatic analysis of microfluidic devices in the frequency domain.
Milan Rother +2 more
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CMOS design of cellular APAPs and FPAPAPs: an overview [PDF]
, 2002 CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors and hence do not need a frontend
Rodríguez Vázquez, Ángel Benito
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Built-In Self-Test of Millimeter-Wave Integrated Front-End Circuits: How Far Have We Come?
IEEE AccessWith automotive radar and 5G/6G communications, mass-market applications for millimeter-wave circuits in silicon technologies have been identified or established in recent years.
Yannick Wenger +2 more
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Design of low-power D-flip-flop based on multithreshold technique(基于多阈值技术的低功耗D触发器设计)
Zhejiang Daxue xuebao. Lixue ban, 2005 目前CMOS电路中，漏电流功耗已经成为不可忽视的部分.降低电路漏电流功耗的一种有效方法是采用多阈值电路技术.根据多阈值电路设计原理，电路的关键路径采用低阈值晶体管，以保证电路的性能；非关键路径采用高阈值晶体管，以降低电路的漏电流功耗.对于触发器来说，其对时钟的响应部分是一个关键路径，而对信号的响应部分是非关键路径.本文据此设计了一种新型低功耗D触发器——多阈值与非门保持型D触发器.该电路结构简单，降低了电路漏电流功耗，并且当输入保持不变时，时钟信号不作用于内部结点，使内部结点电压保持不变 ...
ZHANGHui-xi(张慧熙) +2 more
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Automotive 3.0 µm Pixel High Dynamic Range Sensor with LED Flicker Mitigation
Sensors, 2020 We present and discuss parameters of a high dynamic range (HDR) image sensor with LED flicker mitigation (LFM) operating in automotive temperature range.
Minseok Oh +13 more
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FULLY OPTIMIZED ULTRA WIDEBAND RF RECEIVER FRONT END
Jordanian Journal of Computers and Information Technology, 2022 This paper proposes a novel and fully optimized Ultra-wideband rf receiver front end in UMC 180nm 1P6M CMOS process. The heterodyne architecture used in this work does not use the on-chip image reject mixer.
Rajesh Khatri, D. K. Mishra
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CMOS Architectures and circuits for high-speed decision-making from image flows [PDF]
, 2008 We present architectures, CMOS circuits and CMOS chips to process image flows at very high speed. This is achieved by exploiting bio-inspiration and performing processing tasks in parallel manner and concurrently with image acquisition.
Alba, Luis +8 more
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Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition [PDF]
, 2015 A neuromorphic chip that combines CMOS analog spiking neurons and memristive synapses offers a promising solution to brain-inspired computing, as it can provide massive neural network parallelism and density.
Saxena, Vishal, Wu, Xinyu, Zhu, Kehan
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Modeling and the analysis of control logic for a digital PWM controller based on a nano electronic single electron transistor [PDF]
Serbian Journal of Electrical Engineering, 2008 This paper describes the modelling and the analysis of control logic for a Nano-Device- based PWM controller. A comprehensive simple SPICE schematic model for Single Electron transistor has been proposed. The operation of basic Single Electron Transistor
Rathnakannan Kailasam, Ranjan Vanaja
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