Results 81 to 90 of about 541 (202)
Coercive voltage enhancement in hafnia‐based ferroelectric–dielectric heterostructures is shown to originate from leakage‐governed voltage division between the ferroelectric and dielectric layers. Through experiments, circuit modeling, and defect‐based simulations, a universal framework is established to engineer large memory windows without altering ...
Prasanna Venkatesan +21 more
wiley +1 more source
A lead‐free perovskite memristive solar cell structure that call emulate both synaptic and neuronal functions controlled by light and electric fields depending on top electrode type. ABSTRACT Memristive devices based on halide perovskites hold strong promise to provide energy‐efficient systems for the Internet of Things (IoT); however, lead (Pb ...
Michalis Loizos +4 more
wiley +1 more source
High‐Density and Scalable Graphene Hall Sensor Arrays Through Monolithic CMOS Integration
This work explores strategies to create high‐density arrays of graphene Hall‐effect magnetic field sensors through monolithic integration with silicon CMOS biasing and multiplexing circuitry. High sensor yield and magnetic sensing performance are achieved through careful choices in the custom CMOS chip design and the graphene integration process.
Vasant Iyer +4 more
wiley +1 more source
Model‐Based Time‐Modulated Write Algorithm for 1R Analog Memristive Crossbar Arrays
A novel model‐based time‐modulated write algorithm efficiently programs analog 1R memristive crossbar arrays by varying pulse duration at a fixed voltage. By leveraging a physics‐based compact model and a dynamic gain mechanism, this approach overcomes device nonlinearities and parasitic effects.
Richard Schroedter +7 more
wiley +1 more source
A large-scale coherent 4D imaging sensor. [PDF]
Settembrini FF +12 more
europepmc +1 more source
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez +12 more
wiley +1 more source
A full-featured 2D flash chip enabled by system integration. [PDF]
Liu C +13 more
europepmc +1 more source
Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho +6 more
wiley +1 more source
A ferroelectric-memristor memory for both training and inference. [PDF]
Martemucci M +11 more
europepmc +1 more source
ABSTRACT With the continuous development of computer image processing, developing efficient and low‐power computing devices has become a key challenge. Memristors have integrated in‐situ storage and computing capabilities, making them an ideal choice for low‐power image processing computing architectures. However, current memristors are confronted with
Tengyu Li +4 more
wiley +1 more source

