Results 241 to 250 of about 71,665 (296)
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Latch-Up in CMOS Integrated Circuits
IEEE Transactions on Nuclear Science, 1973The parasitic transistors and pnpn paths present on junction-isolated CMOS circuits have been identified and studied quantitatively. Active SCR structures exist which can be triggered electrically or by a radiation pulse. Detailed studies of SCR paths have been performed on two circuits, the CD4007A and the CD4041A, to relate geometrical and materials ...
B. L. Gregory, B. D. Shafer
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Memristor−CMOS Hybrid Integrated Circuits for Reconfigurable Logic
Nano Letters, 2009Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS.
Qiangfei, Xia +12 more
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Josephson-CMOS integrated circuits
Proceedings of 1994 IEEE International Electron Devices Meeting, 2002We report the development of the first-ever monolithically integrated Josephson-CMOS circuits for digital memory, detector, and magnetometry applications at 4 K. The technology combines a 1.2 /spl mu/m dual-poly, n-well CMOS process, and a Nb/AlO/sub x/Nb trilayer process yielding Josephson junctions with critical current densities of 0.4-0.8 kA/cm/sup
U. Ghoshal, D. Hebert, T. Van Duzer
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CMOS integrated circuit reliability
Microelectronics Reliability, 1981Abstract This paper summarizes recently published data on CMOS integrated circuit failure rates, and provides information on the effects of voltage, temperature, device complexity, and packaging on CMOS failure rates. Other factors which can affect failure rate are also indicated, including designs, materials, processes, in-process controls ...
George L. Schnable, Robert B. Comizzoli
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Silicon gate CMOS integrated circuits
1970 International Electron Devices Meeting, 1970The major advantages offered by silicon-gate CMOS technology have been applied to the fabrication of monolithic integrated circuits for micropower applications. Complementary n- and p-channel enhancement-mode devices fabricated with silicon gate in conjunction with a unique substrate preparation tech, nique have exhibited threshold voltages of 0.5 ± 0 ...
R.R. Burgess, R.G. Daniels
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Novel integrated CMOS sensor circuits
IEEE Transactions on Nuclear Science, 2004Three novel integrated CMOS active pixel sensor circuits for vertex detector applications have been designed with the goal of increased signal-to-noise ratio and speed. First, a large-area native epitaxial silicon photogate sensor was designed to increase the charge collected per hit pixel and to reduce charge diffusion to neighboring pixels.
S. Kleinfelder +9 more
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Radiation-hardened CMOS integrated circuits
Microelectronics Journal, 1980Over the past five years, substantial effort has been directed at radiation-hardening CMOS integrated circuits using various oxide processes. While most of these integrated circuits have been successful in demonstrating megarad hardness, further investigations have shown that the ‘wet-oxide process’ is most compatible with the RCA CD4000 Series process.
A. Pikor, E.M. Reiss
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Reliability of CMOS Integrated Circuits
Computer, 1978CMOS IC s are being produced using a variety of processes, and considerable data is now available on their reliability and failure mechanisms.
G.L. Schnable, L.J. Gallace, H.L. Pujol
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CMOS Photonic Integrated Circuits
Optical Fiber Communication Conference, 2012A platform for Systems-on-Chip with photonic input and output is presented. Electronic-photonic integrated circuits within existing state-of-the-art CMOS foundries are explored with applications ranging from multiprocessor interconnects to coherent communications.
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