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Latch-Up in CMOS Integrated Circuits

IEEE Transactions on Nuclear Science, 1973
The parasitic transistors and pnpn paths present on junction-isolated CMOS circuits have been identified and studied quantitatively. Active SCR structures exist which can be triggered electrically or by a radiation pulse. Detailed studies of SCR paths have been performed on two circuits, the CD4007A and the CD4041A, to relate geometrical and materials ...
B. L. Gregory, B. D. Shafer
openaire   +3 more sources

Memristor−CMOS Hybrid Integrated Circuits for Reconfigurable Logic

Nano Letters, 2009
Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS.
Qiangfei, Xia   +12 more
openaire   +4 more sources

Josephson-CMOS integrated circuits

Proceedings of 1994 IEEE International Electron Devices Meeting, 2002
We report the development of the first-ever monolithically integrated Josephson-CMOS circuits for digital memory, detector, and magnetometry applications at 4 K. The technology combines a 1.2 /spl mu/m dual-poly, n-well CMOS process, and a Nb/AlO/sub x/Nb trilayer process yielding Josephson junctions with critical current densities of 0.4-0.8 kA/cm/sup
U. Ghoshal, D. Hebert, T. Van Duzer
openaire   +1 more source

CMOS integrated circuit reliability

Microelectronics Reliability, 1981
Abstract This paper summarizes recently published data on CMOS integrated circuit failure rates, and provides information on the effects of voltage, temperature, device complexity, and packaging on CMOS failure rates. Other factors which can affect failure rate are also indicated, including designs, materials, processes, in-process controls ...
George L. Schnable, Robert B. Comizzoli
openaire   +1 more source

Silicon gate CMOS integrated circuits

1970 International Electron Devices Meeting, 1970
The major advantages offered by silicon-gate CMOS technology have been applied to the fabrication of monolithic integrated circuits for micropower applications. Complementary n- and p-channel enhancement-mode devices fabricated with silicon gate in conjunction with a unique substrate preparation tech, nique have exhibited threshold voltages of 0.5 ± 0 ...
R.R. Burgess, R.G. Daniels
openaire   +1 more source

Novel integrated CMOS sensor circuits

IEEE Transactions on Nuclear Science, 2004
Three novel integrated CMOS active pixel sensor circuits for vertex detector applications have been designed with the goal of increased signal-to-noise ratio and speed. First, a large-area native epitaxial silicon photogate sensor was designed to increase the charge collected per hit pixel and to reduce charge diffusion to neighboring pixels.
S. Kleinfelder   +9 more
openaire   +1 more source

Radiation-hardened CMOS integrated circuits

Microelectronics Journal, 1980
Over the past five years, substantial effort has been directed at radiation-hardening CMOS integrated circuits using various oxide processes. While most of these integrated circuits have been successful in demonstrating megarad hardness, further investigations have shown that the ‘wet-oxide process’ is most compatible with the RCA CD4000 Series process.
A. Pikor, E.M. Reiss
openaire   +1 more source

Reliability of CMOS Integrated Circuits

Computer, 1978
CMOS IC s are being produced using a variety of processes, and considerable data is now available on their reliability and failure mechanisms.
G.L. Schnable, L.J. Gallace, H.L. Pujol
openaire   +1 more source

CMOS Photonic Integrated Circuits

Optical Fiber Communication Conference, 2012
A platform for Systems-on-Chip with photonic input and output is presented. Electronic-photonic integrated circuits within existing state-of-the-art CMOS foundries are explored with applications ranging from multiprocessor interconnects to coherent communications.
openaire   +1 more source

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