Results 21 to 30 of about 3,011 (245)
New low power adders in Self Resetting Logic with Gate Diffusion Input Technique
The objective vividly defines a new low-power and high-speed logic family; named Self Resetting Logic with Gate Diffusion Input (SRLGDI). This logic family resolves the issues in dynamic circuits like charge sharing, charge leakage, short circuit power ...
R. Uma +2 more
doaj +1 more source
Ultralow-Power SOTB CMOS Technology Operating Down to 0.4 V
Ultralow-voltage (ULV) CMOS will be a core building block of highly energy efficient electronics. Although the operation at the minimum energy point (MEP) is effective for ULP CMOS circuits, its slow operation speed often means that it is not used in ...
Nobuyuki Sugii +9 more
doaj +1 more source
Oxygen‐tunnel (OT) indium tin oxide (ITO) vertical channel transistors (VCTs) enable reliable, high‐density gain‐cell memory for monolithic 3D integration. A sandwiched SiN/SiO2/SiN OT stack selectively regulates oxygen transport, suppressing parasitic electrode oxidation while stabilizing channel oxygen vacancies, thereby suppressing carrier injection
Hyeonho Gu +17 more
wiley +1 more source
Historical Foundation and Practical Guideline for Ferroelectric Switching Kinetic Studies
The P and U pulses in the conventional PUND measurements are not identical because of the interplay between switching current and the measurement circuit components. This circuit effect can lead to a shift in polarization transients and misinterpreted physics in the switching kinetics.
Yi Liang, Pat Kezer, John T. Heron
wiley +1 more source
Nanotechnology and VLSI goes hand in hand. Modernization of electronics and communication systems has demanded for compactness of the devices with low power and high speed.
B. AnishFathima, M. Mahaboob
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Monolithic UV‐ozone oxidation of Ta forms an ultrathin Ta2O5/TaOx bilayer enabling resistive switching with a vertical defect gradient. A stoichiometric surface layer over an oxygen‐deficient sublayer promotes localized filament nucleation near the top interface, enabling low‐voltage operation, and reduced cycle‐to‐cycle variability.
Seunghoon Yang +11 more
wiley +1 more source
LOW POWER AND IMPROVED SPEED 1T DRAM USING DYNAMIC LOGIC [PDF]
The new trend of the DRAM design is to characterize by its reliability, delay, low power dissipation, and area. This paper dealt with the design of 1-bit DRAM and efficient implementation of a sense amplifier.
T. NIRMALRAJ +2 more
doaj
A Carry Lookahead Adder Based on Hybrid CMOS-Memristor Logic Circuit
Memristor-based digital logic circuits open new pathways for exploring advanced computing architectures, which provide a promising alternative to conventional IC technology.
Gongzhi Liu +4 more
doaj +1 more source
Ferroelectric nematic liquid crystals (FNLCs) offer fast, tunable polarization and low‐voltage operation but suffer from poor polarization retention at zero field. Semiconductor‐modified FNLCs enhance polarization retention and exhibit short‐ and long‐term electro‐optical responses, while also supporting spike‐type signal integrations.
Kutay Sagdic, Weiming Yao, Danqing Liu
wiley +1 more source
New Low-Power Tristate Circuits in Positive Feedback Source-Coupled Logic
Two new design techniques to implement tristate circuits in positive feedback source-coupled logic (PFSCL) have been proposed. The first one is a switch-based technique while the second is based on the concept of sleep transistor.
Kirti Gupta +4 more
doaj +1 more source

