Results 191 to 200 of about 4,444 (239)

A novel design of 1-bit full adders for eliminating voltage step in BBL-PT full adder using 32-nm CNTFET technology

International Journal of Electronics
The full adder is essential for building computing systems like multipliers. Optimizing its design with CNTFET technology enhances low power, speed, and circuit density.
V. Tirumalasetty, K. Babulu, G. A. Naidu
semanticscholar   +1 more source

Nonvolatile Associative Memory Design Based on Spintronic Synapses and CNTFET Neurons

IEEE Transactions on Emerging Topics in Computing, 2022
Many advances have been made in developing bio-inspired intelligent systems for performing important tasks like pattern association, which cannot be performed effectively by the conventional computer architectures. This paper presents a novel nonvolatile
Abdolah Amirany, M. H. Moaiyeri, Kian Jafari   +2 more
semanticscholar   +1 more source

New nanotechnology structures CNTFET GaAs

2019 8th International Conference on Renewable Energy Research and Applications (ICRERA), 2019
The nanotechnology market has reached several hundred billion USD. This market is mainly due to the physical characteristics of the CNTs ((Nano Tube Carbon). The conductivity of CNT is up 80 times higher than the copper and the mobility charge of electrons and holes values is greater than 100.103 cm2/Vs compared to 1,5103 cm2/Vs for amorphous silicon ...
M.S. Benbouza, D. Hocine, Y. Zid, A. Benbouza   +3 more
openaire   +1 more source

A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET

IEEE Transactions on Circuits and Systems Part 1: Regular Papers
Silicon-based semiconductor transistors are approaching their physical limits due to shrinking feature sizes. Simultaneously, traditional silicon-based von Neumann architectures exhibit significant latency and power consumption issues in data-centric ...
Zhongzhen Tong, Yilin Xu, Yunlong Liu, Xinrui Duan, Hao-Yang Tang, Suteng Zhao, Chenghang Li, Zhiting Lin, Xiulong Wu, Zhaohao Wang, Xiaoyang Lin   +10 more
semanticscholar   +1 more source

CNTFET-based design of low power charge pump technique-based voltage multiplier

2023 IEEE Devices for Integrated Circuit (DevIC), 2023
This study presents an effective approach for designing voltage multiplier using CNTFET devices based on charge pump and low power consumption for devices used in renewable energy systems.
Ricky Rajora, K. Sharma, Lipika Gupta, Ashish Sachdeva   +3 more
semanticscholar   +1 more source

A CNTFET based stable, single-ended 7T SRAM cell with improved write operation

Physica Scripta
Many researchers are working to improve the write operation in SRAM bit-cell for better write stability, low power dissipation, and minimal access time during the write process. However, the read and hold operation parameters should not be compromised to
Ashish Sachdeva, Kulbhushan Sharma, Anuja Bhargava, Erfan Abbasian   +3 more
semanticscholar   +1 more source

Noise Margin analysis of Efficient CNTFET- based Standard Ternary Inverter

2023 International Conference for Advancement in Technology (ICONAT), 2023
Low-power circuit designs are required for battery-operated devices. A transistor needs to be small enough to be integrated onto a single chip.
Katyayani Chauhan, Shobhit Mittra, Rasika Sinha, Deepika Bansal   +3 more
semanticscholar   +1 more source

Energy-efficient design of quaternary logic gates and arithmetic circuits using hybrid CNTFET-RRAM technology

Physica Scripta
Multi-valued logic (MVL) extends binary logic by providing a framework to represent complex systems with more than two truth values. MVL was introduced to confront the enormous interconnect issue associated with the binary logic in implementing the ...
S. Haq, Erfan Abbasian, Tabassum Khurshid, Vijay Kumar Sharma   +3 more
semanticscholar   +1 more source

Comparison and design of energy-efficient approximate multiplier schemes for image processing by CNTFET

International Journal of Electronics, 2023
Approximate computing is an emerging paradigm that can tolerate some loss of accuracy to improve the energy consumption and design complexity. Multiplication is one of the important computational components in various digital signal processing (DSP ...
Elmira Tavakkoli, Shayan Shokri, M. Aminian   +2 more
semanticscholar   +1 more source

Low leakage CNTFET full adders

2015 Global Conference on Communication Technologies (GCCT), 2015
As the technology scales down to 32nm or below, the leakage power starts dominating the total power. Reduction of this leakage problem is the major problem, today's CMOS technology is facing. Hence researchers are looking for alternate technologies. The Carbon Nanotubes FET (CNTFET) is found to be a most promising device that becomes alternative or ...
Rajendra Prasad Somineni, Y Padma Sai, S Naga Leela   +2 more
openaire   +1 more source