Results 21 to 30 of about 1,586 (166)
A 0.9 V high‐speed dynamic bias latch‐type comparator employing a voltage‐controlled delay line
Electronics LettersThis paper presents a novel dynamic bias latch‐type comparator combined with a voltage‐controlled delay line (VCDL), designed specifically for low‐power and low‐noise applications in high‐speed analog‐to‐digital converters (ADCs).
Feng Tai, Yige Liu, Puyi Bai, Qiang Li
doaj +1 more source
A HIGH-SPEED CMOS CURRENT COMPARATOR SUITABLE FOR ALGORITHMIC ANALOG-TO-DIGITAL CONVERTERS
Electrica, 2008 This paper introduces a high-speed high resolution CMOS current comparator which is used in an algorithmic Analog-to-Digital Converter (ADC) and implemented with a 0.6 μm standard CMOS process. Circuit occupies 170 x 80μm2.
Tolga KAYA, Ali ZEKI
doaj +2 more sources
A CNRZ-7 Based Wireline Transceiver With High-Bandwidth-Density, Low-Power for D2D Communication
IEEE Access, 2022 A novel high-speed transceiver based on 7 bit correlated non-return-to-zero(CNRZ-7) with high-bandwidth-density(bandwidth per unit length) and low-power for Die-to-Die(D2D) communication is proposed.
Geng Zhang +8 more
doaj +1 more source
BTI Aging Influence Analysis and Mitigation in Flash ADCs
ChipsBias Temperature Instability (BTI)-induced aging of transistors is a serious concern in modern electronic circuits, yet its effects on the operation of mixed-signal circuits have not been extensively studied.
Konstantina Mylona +2 more
doaj +1 more source
A low kickback fully differential dynamic comparator for pipeline analog‐to‐digital converters
Engineering Reports, 2019 This study presents a fully differential dynamic comparator with low kickback noise, an effect caused by voltage variations in the regeneration nodes of these types of circuit.
Jose‐Angel Diaz‐Madrid +3 more
doaj +1 more source
Schmitt Trigger with Controllable Hysteresis Using Current Conveyors
International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems, 2012 Active elements working in the current or mixed mode are still attractive for the design of analog functional blocks. The current conveyor (CC) was defined already in 1968.
Jiri Misurec, Jaroslav Koton
doaj +1 more source
Instruments, 2023 In the field of radiation instrumentation, there is a desire to reach a sub-10 ps FWHM timing resolution for applications such as time-of-flight positron emission tomography, time-of-flight positron computed tomography and time-resolved calorimetry.
Frédéric Nolet +7 more
doaj +1 more source
International Journal of Reconfigurable Computing, 2012 This paper presents a 6 bit, 11 MS/s time-interleaved pipeline A/D converter design. The specification process, from block level to elementary circuits, is gradually covered to draw a design methodology.
Wilmar Carvajal, Wilhelmus Van Noije
doaj +1 more source
A Low-Power High-Speed Dynamic Comparator With a Transconductance-Enhanced Latching Stage
IEEE Access, 2019 Low-power, high-speed dynamic comparators are highly desirable in the design of high-speed analog-to-digital converters (ADC) and digital I/O circuits. Most dynamic comparators use a pair of cross-coupled inverters as the latching stage, which provides ...
Yao Wang +5 more
doaj +1 more source
Ionizing radiation influence on parameters of analog components of the master slice array МН2ХА030
Доклады Белорусского государственного университета информатики и радиоэлектроники, 2021 Structured arrays and master slice arrays are often used to reduce cost, design and test time for radiation hardened analog integrated circuits. One of such master slice arrays is МН2ХА030, which uses bipolar and junction field-effect transistors.
O. V. Dvornikov +4 more
doaj +1 more source