Results 31 to 40 of about 12,729 (243)

Fast, non-monte-carlo estimation of transient performance variation due to device mismatch [PDF]

, 2010
This paper describes an efficient way of simulating the effects of device random mismatch on circuit transient characteristics, such as variations in delay or in frequency.
Horowitz, M., Jones, K., Kim, J.
core   +1 more source

Testing mixed-signal cores: a practical oscillation-based test in an analog macrocell [PDF]

, 2002
A formal set of design decisions can aid in using oscillation-based test (OBT) for analog subsystems in SoCs. The goal is to offer designers testing options that do not have significant area overhead, performance degradation, or test time.
Huertas Díaz, José Luis, Huertas Sánchez, Gloria, Peralías Macías, Eduardo, Rueda Rueda, Adoración, Vázquez García de la Vega, Diego   +4 more
core   +1 more source

Fail-safe numerical control [PDF]

, 1970
System provides duplicate set of control logic circuitry. Comparators insure that the same data is present in both circuits.
Thompson, G. A.
core   +1 more source

Robust high-accuracy high-speed continuous-time CMOS current comparator [PDF]

, 1997
The authors present a CMOS current comparator which employs nonlinear negative feedback to obtain high-accuracy (down to 1.5pA) and high-speed for low input currents (8ns at 50nA). The new structure features a speed improvement of more than two orders of
Domínguez Castro, Rafael, Liñán Cembrano, Gustavo, Rodríguez Vázquez, Ángel Benito, Río Fernández, Rocío del   +3 more
core   +1 more source

A 0.9 V high‐speed dynamic bias latch‐type comparator employing a voltage‐controlled delay line

Electronics Letters
This paper presents a novel dynamic bias latch‐type comparator combined with a voltage‐controlled delay line (VCDL), designed specifically for low‐power and low‐noise applications in high‐speed analog‐to‐digital converters (ADCs).
Feng Tai, Yige Liu, Puyi Bai, Qiang Li
doaj   +1 more source

A CNRZ-7 Based Wireline Transceiver With High-Bandwidth-Density, Low-Power for D2D Communication

IEEE Access, 2022
A novel high-speed transceiver based on 7 bit correlated non-return-to-zero(CNRZ-7) with high-bandwidth-density(bandwidth per unit length) and low-power for Die-to-Die(D2D) communication is proposed.
Geng Zhang, Mingche Lai, Fangxu Lyu, Xuqiang Zheng, Heming Wang, Dongbin Lv, Chaolong Xu, Xingyun Qi, Qing Liu   +8 more
doaj   +1 more source

Self‐Powered Flexible Triboelectric‐Gated Ion‐Gel Transistor for Neuromorphic Tactile Sensing and Human Activity Recognition

Advanced Materials, EarlyView.
A fully flexible ion‐gel‐gated graphene‐channel transistor driven by a triboelectric nanogenerator enables self‐powered tactile sensing and synaptic learning. Mimicking spike‐rate‐dependent plasticity, the device exhibits frequency‐selective potentiation and depression, supporting rate‐coded neuromorphic computation even under flex.
Hanseong Cho, Seoyeon Park, Youngmin Lee, Sejoon Lee   +3 more
wiley   +1 more source

Topological solution of bilateral switching networks [PDF]

, 1972
Topological method uses the eye as pattern detector to trace path of transmission on truth table. Pathway selection is continually supervised by logician, allowing him to seek planar iterative solution desirable for fabrication of monolithic circuits ...
Mazer, L.
core   +1 more source

Two improved methods for testing ADC parametric faults by digital input signals [PDF]

, 2009
In this paper, two improved methods are presented extending our previous work. The first one improves the results by adjusting the voltage levels of the input pulse wave stimulus.
Kerkhoff, Hans G., Sheng, Xiaoqin
core   +4 more sources

BTI Aging Influence Analysis and Mitigation in Flash ADCs

Chips
Bias Temperature Instability (BTI)-induced aging of transistors is a serious concern in modern electronic circuits, yet its effects on the operation of mixed-signal circuits have not been extensively studied.
Konstantina Mylona, Helen-Maria Dounavi, Yiorgos Tsiatouhas   +2 more
doaj   +1 more source