Results 11 to 20 of about 214,421 (299)
Most Resource Efficient Matrix Vector Multiplication on FPGAs
IEEE Access, 2023 Fast and resource-efficient inference in artificial neural networks (ANNs) is of utmost importance and drives many new developments in the area of new hardware architectures, e.g., by means of systolic arrays or algorithmic optimization such as pruning ...
Alexander Lehnert +4 more
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Electromagnetic Security Vulnerabilities and Instruction Disassembly of Controller in Adaptive Controllers [PDF]
Journal of Systemics, Cybernetics and Informatics, 2021 A controller in adaptive control theory is a critical part in mission critical applications in military and computer-controlled systems. An ability to identify and follow the binary instruction execution in the controller part enables fault ...
Varghese Mathew Vaidyan, Akhilesh Tyagi
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Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization
IEEE Access, 2021 Homomorphic Encryption (HE) has drawn significant attention as a privacy-preserving approach for cloud computing because it allows computation on encrypted messages called ciphertexts. Among the numerous HE schemes proposed thus far, HE for Arithmetic of
Wonkyung Jung +8 more
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A Method for Evaluating and Selecting Suitable Hardware for Deployment of Embedded System on UAVs
Sensors, 2020 The use of UAVs for remote sensing is increasing. In this paper, we demonstrate a method for evaluating and selecting suitable hardware to be used for deployment of algorithms for UAV-based remote sensing under considerations of Size, Weight, Power, and ...
Nicolas Mandel +2 more
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An Approach to the Construction of a Network Processing Unit
Моделирование и анализ информационных систем, 2019 The paper proposes the architecture and basic requirements for a network processor for OpenFlow switches of software-defined networks. An analysis of the architectures of well-known network processors is presented − NP-5 from EZchip (now Mellanox) and ...
Stanislav O. Bezzubtsev +6 more
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Circuit centric quantum architecture design
IET Quantum Communication, 2021 With the development in the field of quantum physics, several methods for building a quantum computer have emerged. These differ in qubit technologies, interaction topologies, and noise characteristics.
Utkarsh Azad +4 more
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Applied Sciences, 2021 The emergence of big data processing and machine learning has triggered the exponential growth of the working set sizes of applications. In addition, several modern applications are memory intensive with irregular memory access patterns.
Sae-Gyeol Choi +2 more
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Expansible Network-on-Chip Architecture
Advances in Electrical and Computer Engineering, 2018 Interconnection has a great importance to provide a high bandwidth communication among parallel systems. On multi-core context, Network-on-Chip is the default intra-chip interconnection choice, providing low contention and high bandwidth between the ...
PIRES, I. L. P. +2 more
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The Prism Bridge: Maximizing Inter-Chip AXI Throughput in the High-Speed Serial Era
IEEE Access, 2023 In this paper, we present the Prism Bridge, a soft IP core developed to bridge FPGA-MPSoC systems using high-speed serial links. Considering the current trend of ubiquitous serial transceivers with staggeringly increasing line rates, minimizing overhead ...
Robert Drehmel, Hans-Ulrich Heiss
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Practical Verifiable Computation by Using a Hardware-Based Correct Execution Environment
IEEE Access, 2020 The verifiable computation paradigm has been studied extensively as a means to verifying the result of outsourced computation. In said scheme, the verifier requests computation from the prover and verifies the result by checking the output and proof ...
Junghee Lee +4 more
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