Results 31 to 40 of about 5,552,920 (364)
An Approach to the Construction of a Network Processing Unit
The paper proposes the architecture and basic requirements for a network processor for OpenFlow switches of software-defined networks. An analysis of the architectures of well-known network processors is presented − NP-5 from EZchip (now Mellanox) and ...
Stanislav O. Bezzubtsev+6 more
doaj +1 more source
Circuit centric quantum architecture design
With the development in the field of quantum physics, several methods for building a quantum computer have emerged. These differ in qubit technologies, interaction topologies, and noise characteristics.
Utkarsh Azad+4 more
doaj +1 more source
The Prism Bridge: Maximizing Inter-Chip AXI Throughput in the High-Speed Serial Era
In this paper, we present the Prism Bridge, a soft IP core developed to bridge FPGA-MPSoC systems using high-speed serial links. Considering the current trend of ubiquitous serial transceivers with staggeringly increasing line rates, minimizing overhead ...
Robert Drehmel, Hans-Ulrich Heiss
doaj +1 more source
The emergence of big data processing and machine learning has triggered the exponential growth of the working set sizes of applications. In addition, several modern applications are memory intensive with irregular memory access patterns.
Sae-Gyeol Choi+2 more
doaj +1 more source
A Quantum Computer Architecture using Nonlocal Interactions [PDF]
Several authors have described the basic requirements essential to build a scalable quantum computer. Because many physical implementation schemes for quantum computing rely on nearest neighbor interactions, there is a hidden quantum communication ...
Brennen, Gavin K.+2 more
core +2 more sources
Design of a processor to support the teaching of computer systems [PDF]
Teaching computer systems, including computer architecture, assembly language programming and operating system implementation, is a challenging occupation.
Armstrong, Dean Andrew+2 more
core +2 more sources
Computer Architecture with Associative Processor Replacing Last-Level Cache and SIMD Accelerator [PDF]
This study presents a computer architecture, where a last-level cache and a SIMD accelerator are replaced by an associative processor. Associative processor combines data storage and data processing, and functions as a massively parallel SIMD processor ...
L. Yavits, A. Morad, R. Ginosar
semanticscholar +1 more source
Fast Hybrid Data Structure for a Large Alphabet K-Mers Indexing for Whole Genome Alignment
The most common index data structures used by whole genome aligners (WGA) are based on suffix trees (ST), suffix arrays, and FM-indexes. These data structures show good performance results as WGA works with sequences of letters over small alphabets; for ...
Rostislav Hrivnak+2 more
doaj +1 more source
A Decision Architecture for Safety Computations
Accurately estimating safety is critical to pursuing non-defensive survival behaviors, including reproduction and feeding. Relatively little attention, however, has been paid to how the human brain computes safety. We conceptualize a model that consists of two components: threat-oriented evaluations that focus on threat value, imminence, and ...
Sarah M. Tashjian+2 more
openaire +6 more sources
An Area Efficient Composed CORDIC Architecture
This article presents a composed architecture for the CORDIC algorithm. CORDIC is a widely used technique to calculate basic trigonometric functions using only additions and shifts.
AGUIRRE-RAMOS, F.+3 more
doaj +1 more source