Results 21 to 30 of about 390,681 (199)
Efficient Polynomial Multiplication for HQC on ARM Cortex-M4 [PDF]
Transactions on Cryptographic Hardware and Embedded SystemsIn this paper, we propose the Hybrid FAFFT-CRT method for accelerating HQC polynomial multiplication on the ARM Cortex-M4. The method uses the Chinese Remainder Theorem to map the polynomial ring to a product of an FAFFTfriendly ring of size 2d+1 and a ...
Jihoon Jang +5 more
doaj +4 more sources
Optimized implementation of HQC on Cortex-M4
ICT ExpressIn March 2025, NIST selected HQC as a standardized PQC algorithm. Since HQC relies on binary polynomial operations, optimizations for prime-field schemes like Kyber are not directly applicable.
DongCheon Kim +3 more
doaj +3 more sources
Bacillus subtilis YpeB holds SleB inactive, preventing cortex peptidoglycan degradation during spore dormancy [PDF]
mBioBacterial endospores are encased in a thick layer of specialized peptidoglycan called the cortex that is essential for core dehydration and heat resistance.
Yongqiang Gao +3 more
doaj +2 more sources
Falcon on ARM Cortex-M4: an Update [PDF]
IACR Cryptol. ePrint Arch.This note reports new implementation results for the Falcon signature algorithm on an ARM Cortex-M4 microcontroller.
Thomas Pornin
core +3 more sources
Multi-Parameter Support with NTTs for NTRU and NTRU Prime on Cortex-M4
Transactions on Cryptographic Hardware and Embedded Systems, 2022 We propose NTT implementations with each supporting at least one parameter of NTRU and one parameter of NTRU Prime. Our implementations are based on size-1440, size-1536, and size-1728 convolutions without algebraic assumptions on the target polynomial ...
Erdem Alkim, Vincent Hwang, Bo-Yin Yang
doaj +7 more sources
SIKE Round 2 Speed Record on ARM Cortex-M4 [PDF]
, 2019 We present the first practical software implementation of Supersingular Isogeny Key Encapsulation (SIKE) round 2, targeting NIST’s 1, 2, and 5 security levels on 32-bit ARM Cortex-M4 microcontrollers. The proposed library introduces a new speed record of
Reza Azarderakhsh +2 more
core +4 more sources
Generation of Fast Finite Field Arithmetic forCortex-M4 with ECDH and SQIsign Applications [PDF]
Transactions on Cryptographic Hardware and Embedded SystemsFinite field arithmetic is central to several cryptographic algorithms on embedded devices like the ARM Cortex-M4, particularly for elliptic curve and isogenybased cryptography.
Felix Carvalho Rodrigues +7 more
doaj +4 more sources
Optimized One-Dimensional SQIsign Verification on Intel and Cortex-M4 [PDF]
Transactions on Cryptographic Hardware and Embedded SystemsSQIsign is a well-known post-quantum signature scheme due to its small combined signature and public-key size. However, SQIsign suffers from notably long signing times, and verification times are not short either.
Marius A. Aardal +8 more
doaj +5 more sources
Additive FFTs for HQC on ARM Cortex-M4, Revisited
Transactions on Cryptographic Hardware and Embedded SystemsThis paper presents an optimized implementation of the Hamming Quasi- Cyclic (HQC) key encapsulation mechanism, leveraging the additive fast Fourier transform (FFT) for polynomial multiplication.
Ming-Shing Chen +5 more
doaj +2 more sources
Real-time GSM broadcast receiver on a Cortex-M4 microcontroller
2018 IEEE Topical Conference on Wireless Sensors and Sensor Networks (WiSNet), 2018 Recent microcontrollers provide enough computing power to perform signal processing while still being energy efficient and enable more flexibility than FPGAs.
Pflaum, Felix +3 more
core +3 more sources