Results 21 to 30 of about 263,258 (207)
A Real-Time Cache Side-Channel Attack Detection System on RISC-V Out-of-Order Processor
IEEE Access, 2021 Computer designers have included techniques such as speculative execution and caching to optimize speed and performance. Unfortunately, they could be exploited by the recently discovered cache-side channel attack, spectre. The purpose of this research is
Anh-Tien Le +5 more
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On the Effects of CPU Caches on MPI Point-to-Point Communications [PDF]
2012 IEEE International Conference on Cluster Computing, 2012 Several researchers investigated the placing of communication calls in message-passing parallel codes. The current rule of thumb it to maximize communication/computation overlap with early binding. In this work, we demonstrate that this is not the only design constraint because CPU caches can have a significant impact on communications.
Simone Pellegrini +2 more
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IOb-Cache: A High-Performance Configurable Open-Source Cache
Algorithms, 2021 Open-source processors are increasingly being adopted by the industry, which requires all sorts of open-source implementations of peripherals and other system-on-chip modules.
João V. Roque +3 more
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ESL: A High-Performance Skiplist with Express Lane
Applied Sciences, 2023 With the increasing capacity and cost-efficiency of DRAM in multi-core environments, in-memory databases have emerged as fundamental solutions for delivering high performance.
Yedam Na +4 more
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Design and Analysis of On-Chip CPU Pipelined Caches [PDF]
, 2000 The access time of the first level on-chip cache usually imposes the cycle time of high-performance VLSI processors. The only way to reduce the effect of cache access time on processor cycle time is the use of pipelined caches. A timing model for on-chip caches has recently been presented in [1].
C. Ninos +2 more
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Data Rates Assessment on L2–L3 CPU Bus and Bus between CPU and RAM in Modern CPUs
Моделирование и анализ информационных систем, 2017 In this paper, a modern CPU architecture with several different cache levels is described, and current CPU performance limitations such as silicone physical limitations or frequency increase bounds are mentioned.
Maria S. Komar
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SIMULADOR DE UCP COM SUPORTE À MEMÓRIA CACHE E PIPELINE
Colloquium Exactarum, 2014 A common problem in computer architecture disciplines is the real dynamics of the processes occurring internally in hardware. The working of a CPU, for example, is complex and its understanding is fundamental to the use of their resources.
Artur Jordão Lima Correia +4 more
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Cache Misses and the Recovery of the Full AES 256 Key
Applied Sciences, 2019 The CPU cache is a hardware element that leaks significant information about the software running on the CPU. Particularly, any application performing sequences of memory access that depend on sensitive information, such as private keys, is susceptible ...
Samira Briongos +3 more
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Proposal New Cache Coherence Protocol to Optimize CPU Time through Simulation Caches [PDF]
Engineering and Technology Journal, 2016 The cache coherence is the most important issue that rapidly affected the performance of a multicore processor as a result of increasing the number of cores on chip multiprocessors and the shared memory program that will be run on these processors ...
Luma Fayeq Jalil +2 more
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A Survey of Cache Bypassing Techniques
Journal of Low Power Electronics and Applications, 2016 With increasing core-count, the cache demand of modern processors has also increased. However, due to strict area/power budgets and presence of poor data-locality workloads, blindly scaling cache capacity is both infeasible and ineffective.
Sparsh Mittal
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