Results 151 to 160 of about 1,268,711 (203)

CRC (Cyclic Redundancy Check) Implementation in High-Speed Semiconductor Memory

2015 8th International Conference on Control and Automation (CA), 2015
This paper presents a CRC scheme for the semiconductor memory devices. Conventional error detecting method by using the ATM-8 HEC code leads to a considerable burden on the timing margin at the time of reading and writing of the low power memory devices for CRC(Cyclic Redundancy Check) calculations.
exaly   +2 more sources

Joint optimum message length and generator polynomial selection in cyclic redundancy check (CRC) coding

2011 IEEE 19th Signal Processing and Communications Applications Conference (SIU), 2011
Cyclic Redundancy Checks (CRCs) are extensively used for effective error detection in communication systems. Previous studies evaluate the performance of CRC generator polynomials solely based on their Undetectable Error (UE) criterion without taking retransmission and overhead dynamics into account.
Hüseyin Arslan, Ibrahim Hökelek
exaly   +2 more sources

Implementation of Table-Based Cyclic Redundancy Check (CRC-32) for Gigabit Ethernet Applications

2023 4th International Conference for Emerging Technology (INCET), 2023
P Kishore
exaly   +2 more sources

Design of Cyclic Redundancy Check (CRC) Code Generator Circuit in Quantum Dot Cellular Automata (QCA) for Communication

2023 26th International Conference on Computer and Information Technology (ICCIT), 2023
Mohammad Ishtiaque Khan, Muhammad Mostafa Amir Faisal   +1 more
exaly   +2 more sources

Cyclic Redundancy Check (CRC)

2009
exaly   +2 more sources

Variable Parallelism Cyclic Redundancy Check Circuit for 3GPP-LTE/LTE-Advanced [PDF]

IEEE Signal Processing Letters, 2014
Cyclic Redundancy Check (CRC) is often employed in data storage and communications to detect errors. The 3GPP-LTE wireless communication standard uses a 24-bit CRC with every turbo coded frame, thus, the CRC can be exploited to detect residual errors and
Carlo Condo, Maurizio Martina, Gianluca Piccinini   +2 more
exaly   +2 more sources

A self-timed cyclic redundancy check (CRC) in VLSI

Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg, 1999
A self-timed approach to implement a cyclic redundancy check (CRC) for the application of telecommunications is described. The approach is oriented toward multiple channel communications. The paper presents a new scheme to handle an asynchronous feedback to implement the CRC engine.
S.Henry Li, Charles A. Zukowski
openaire   +1 more source

Interleaved cyclic redundancy check (CRC) code

The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003, 2004
In this paper, we investigate interleaved cyclic redundancy check (CRC) code. The interleaved CRC can be obtained by merging independent small message blocks into one large block (merged interleaving) or by dividing the original message block into independent small sub blocks (divided interleaving) and then by alternatively dividing the resulting ...
null Jun Jin Kong, K.K. Parhi
openaire   +1 more source

Pipelined Cyclic Redundancy Check (CRC) Calculation

2007 16th International Conference on Computer Communications and Networks, 2007
Traditional methods to calculate CRC suffer from diminishing returns. Doubling the data width doesn't double the maximum data throughput, the worst case timing path becomes slower. Feedback in the traditional implementation makes pipelining problematic. However, the on chip data width used for high throughput protocols is constantly increasing.
openaire   +2 more sources

A symbol based algorithm for hardware implementation of cyclic redundancy check (CRC)

Proceedings VHDL International Users' Forum. Fall Conference, 2002
Describes a symbolic simulation-based algorithm to derive optimized Boolean equations for a parameterizable data width CRC generator/checker. The equations are then used to implement a data flow representation of the CRC circuit in VHDL. The VHDL description is subsequently synthesized to gates.
R. Nair, G. Ryan, F. Farzaneh
openaire   +1 more source