Results 211 to 220 of about 5,312 (258)
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Fractional-Order Digital Phase-Locked Loop
2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007A fractional-order digital phase-locked loop (FODPLL) is proposed. The FODPLL model is developed by approximating a fractional-order digital controlled-oscillator (FODCO) with a finite dimensional discrete transfer function. The design of FODPLLs model is simplified where one only needs to design a FODCO.
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IEEE Transactions on Circuits and Systems Part 2: Express Briefs, 2007
Kartikeya Mayaram +2 more
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Kartikeya Mayaram +2 more
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Phase-domain all-digital phase-locked loop
IEEE Transactions on Circuits and Systems Part 2: Express Briefs, 2005P T Balsara, R B Staszewski
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Design and Emulation of All-Digital Phase-Locked Loop on FPGA
Electronics (Switzerland), 2019Sai Chandra Teja R, Toshimasa Matsuoka
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All digital phase-locked loop: concepts, design and applications
IEE Proceedings, Part F: Radar and Signal Processing, 1989Y R Shayan, T Le-Ngoc
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A 40-GHz Fast-Locked All-Digital Phase-Locked Loop Using a Modified Bang-Bang Algorithm
IEEE Transactions on Circuits and Systems II: Express Briefs, 2011Shen-Iuan Liu
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A digital phase-locked loop based LLRF system
Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2020Xiaoliang Fu
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