Results 241 to 250 of about 2,839 (257)

Digital calibration technique using a signed counter for charge pump mismatch in phase‐locked loops

IET Circuits, Devices and Systems, 2013
Soo-Won Kim
exaly  

Digital–analog, analog–digital, and phase-locked loops

2020
openaire   +1 more source

Phase-jitter dynamics of digital phase-locked loops

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 1999
O Feely
exaly  

Controlled-root formulation for digital phase-locked loops

IEEE Transactions on Aerospace and Electronic Systems, 1995
S A Stephens, J B Thomas
exaly  

A Class of All Digital Phase Locked Loops: Modeling and Analysis

IEEE Transactions on Industrial Electronics and Control Instrumentation, 1973
Someshwar C Gupta
exaly  

Design of Low Power Digital Phase Lock Loops

2006 IEEE International SOC Conference, 2006
K. Nagaraj, N. Nayak
openaire   +1 more source

Synchronization Analysis of Networks of Self-Sampled All-Digital Phase-Locked Loops

IEEE Transactions on Circuits and Systems I: Regular Papers, 2012
Jérôme Juillard, Dimitri Galayko
exaly  

Digital phase-locked loops tracked by a relay sensor

IEEE Transactions on Communications, 1999
Jonathan R Partington, M Sorine
exaly  

Phase-locked loops

Proceedings of the IEEE, 1975
exaly  

Noise-Shaping All-Digital Phase-Locked Loops

Analog Circuits and Signal Processing Series, 2014
Michael Peter Kennedy
exaly