Results 71 to 80 of about 41,111,468 (182)
, 2014 This tutorial is provided by National Instruments and includes information on phase-locked loops. "A phase-locked loop (PLL) is a feedback control circuit that synchronizes the phase of a generated signal with that of a reference signal.& ...
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, 2022 In this paper, based on an analysis of operating principle of digital/time converter (DTC) employed in fractional-N digital Bang-Bang phase-locked-loops, the authors derive an estimation of frequency of fractional spur appearing in the phase noise power ...
Minh, V. T. (Võ) +3 more
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Quantum Optical Temporal Phase Estimation by Homodyne Phase-Locked Loops
, 2009 Using classical estimation techniques, we design homodyne phase-locked loops for optical temporal phase and instantaneous frequency measurements at the quantum ...
Tsang, Mankei +5 more
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Phase locked loops: design, simulation, and applications
, 2007 The Definitive Introduction to Phase-Locked Loops, Complete with Software for Designing Wireless Circuits! The Sixth Edition of Roland Best's classic Phase-Locked Loops has been updated to equip you with today's definitive introduction to PLL design ...
Best, Roland E
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A Non-SOGI Single-Phase Frequency-Locked Loop Based on Synchronous Frequency Tracking Filter with Enhanced Immunity to Sensor-Induced DC Offsets. [PDF]
Sensors (Basel)Sevilmiş F.
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Description:This learning module is provided by Work-Ready Electronics and covers phase-locked loops. Work-Ready Electronics modules are intended to be used either independently or integrated with current electronics curricula in college programs.
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Concurrent excitation and detection in magnetic resonance using voltage-controlled oscillators. [PDF]
Sci AdvZhao Z +10 more
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PRINCIPLES OF PHASE-LOCKED LOOPS MATHEMATICAL MODELS CONSTRUCTION
, 2019 The results of various embodiments study of the hardware and software phase-locked loops, suggesting possible variants of generalized mathematical models of the multi-systems as well as devices with a cyclic interrupt mode-locked are presented.
M. P. Batura +3 more
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Adaptively enhanced phase locked loops
, 2005 A method that enhances the performance of a phase locked loop is proposed. The method is based on integrating an adaptive frequency estimator into a standard phase locked loop.
Gokcek, S, Gokcek, C, Jeltema, JA
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An Observer-Data-Path Decoupled Time-Domain ADC with Three-Stage Digital Background Calibration in 28 nm CMOS. [PDF]
Micromachines (Basel)Qin C, Liu B, Wang R, Li L, Zhang C.
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