Results 51 to 60 of about 1,070 (143)
RF Front‐End Circuits and Architectures for IoT/LTE‐A/5G Connectivity
, 2018 Wireless Communications and Mobile Computing, Volume 2018, Issue 1, 2018.
Yan Li +4 more
wiley +1 more source
A 42.7Gb/s Optical Receiver With Digital Clock and Data Recovery in 28nm CMOS
IEEE AccessThis paper presents a broadband optical receiver that employs multiple bandwidth extension techniques in analog front-end (AFE) and has efficient digital clock and data recovery (CDR). The AFE is implemented exclusively with inverter-based stages.
Hyungryul Kang +7 more
doaj +1 more source
Measurement of Symmetric Cipher on Low Power Devices for Power Grids [PDF]
, 2015 The symmetric ciphers are often used in low power devices for its low requirements. This article provides a measurement of AES-128 cipher, which should be used for secure communication in power grid (smart grid) networks.
Fujdiak, R.
core
IEEE AccessThis paper proposes a low-power design method and a low-noise phase offset calibration technique for a gated ring-oscillator time-to-digital converter (GRO-TDC), which normally consumes a large percentage of most all-digital phase-locked loop (ADPLL ...
Kyoung-Ub Cho +9 more
doaj +1 more source
A Design of Bang-Bang PLL in Low Jitter and Wide Pull-in Range [PDF]
, 2014 As bang-bang PLL (BBPLL) could resume clock data rapidly, its application in clock data recovery has become increasingly abroad. Aiming at the contrary demand of lower jitter and wider pull-in range of BBPLL, the issue puts forth a method to choose the ...
Chen, Xihong, Hu, Denghua, Liu, Qiang
core +2 more sources
Optimal and robust control for a small-area FLL [PDF]
, 2011 International audienceFine-grain Dynamic Voltage and Frequency Scaling (DVFS) is becoming a requirement for Globally-Asynchronous Locally-Synchronous (GALS) architectures. However, the area overhead of adding voltage and frequency control engines in each
Albea-Sanchez, Carolina +3 more
core +1 more source
Acoustic charge transport technology investigation for advanced development transponder [PDF]
Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF).
Kayalar, S.
core +1 more source
전원 잡음에 둔감한 고리 발진기와 디지털 위상 동기 회로 설계 [PDF]
, 2023 학위논문(석사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2023. 2. 정덕균.One of the critical blocks integrated into the PAM4-binary bridge, bridging the high-speed DRAM and the low-speed DRAM Tester, is an All-Digital Phase-Locked Loop (ADPLL).
백경민
core
Development of an Oxygen Saturation Monitoring System by Embedded Electronics [PDF]
, 2017 Measuring Oxygenation of blood (SaO2) plays a vital role in patient’s health monitoring. This is often measured by pulse oximeter, which is standard measure during anesthesia, asthma, operative and post-operative recoveries.
Venkatesan Gomathy, Manikandan
core +2 more sources
비례 이득값과 적분 이득값의 동시 최적화 기술을 사용하는 ADPLL의 설계 [PDF]
, 2023 학위논문(석사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2023. 8. 정덕균.Noise performance of a PLL is an important factor to consider when designing a PLL. The unwanted variation in the timing clock edges can deteriorate system performance.
하경준
core