Steady-state probability density function of the phase error for a DPLL with an integrate-and-dump device [PDF]
The steady-state behavior of a particular type of digital phase-locked loop (DPLL) with an integrate-and-dump circuit following the phase detector is characterized in terms of the probability density function (pdf) of the phase error in the loop ...
Mileant, A., Simon, M.
core +1 more source
The Deep Space Network Tracking System, Mark 4-A, 1986 [PDF]
The Deep Space Network (DSN) Tracking System provides highly precise measurements of spacecraft Doppler and range. It was recently extensively modified as part of the Mark 4-A implementation.
Wackley, J. A.
core +1 more source
Digitally Controlled Oscillator for mm-Wave Frequencies [PDF]
In the fifth generation of mobile communication, 5G, frequencies above 30 GHz, so-called millimeter-wave (mm-wave) frequencies are expected to play a prominent role.
Gannedahl, Rikard, Holmstedt, Johan
core
A Bang-Bang All-Digital PLL for Frequency Synthesis [PDF]
: Phase locked loops are an integral part of any electronic system that requires a clock signal and find use in a broad range of applications such as clock and data recovery circuits for high speed serial I/O and frequency synthesizers for RF ...
core
A Low Power Hybrid DCO Using Three Transistor (3-T) XNOR Gate, CMOS and Pseudo-NMOS Inverter [PDF]
This research article presents a comprehensive investigation of three-bit hybrid-digitally controlled ring oscillator (HDCRO) implemented with TMSC 90nm CMOS technology. The hybrid circuit HDCRO comprises of three distinct delay stages, namely XNOR-based
Bagri, Manju +2 more
core +2 more sources
Evaluation of the Effects of Mobile Smart Object to Boost IoT Network Synchronization. [PDF]
Lamonaca F, Carnì DL.
europepmc +1 more source
The Deep Space Network. An instrument for radio navigation of deep space probes [PDF]
The Deep Space Network (DSN) network configurations used to generate the navigation observables and the basic process of deep space spacecraft navigation, from data generation through flight path determination and correction are described.
Berman, A. L. +4 more
core +1 more source
NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor. [PDF]
Borejko T +11 more
europepmc +1 more source
The advanced receiver 2: Telemetry test results in CTA 21 [PDF]
Telemetry tests with the Advanced Receiver II (ARX II) in Compatibility Test Area 21 are described. The ARX II was operated in parallel with a Block-III Receiver/baseband processor assembly combination (BLK-III/BPA) and a Block III Receiver/subcarrier ...
Bevan, R., Hinedi, S., Marina, M.
core +1 more source
A 0.19×0.17mm2 Wireless Neural Recording IC for Motor Prediction with Near-Infrared-Based Power and Data Telemetry. [PDF]
Lim J +13 more
europepmc +1 more source

