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Design of a Counter-Based DPWM Using RC Charge
2014 International Symposium on Computer, Consumer and Control, 2014Conventional counter-based digital PWM (DPWM) has simple hardware architecture to generate the PWM pulse, however, the resolution of the counter-based DPWM is directly proportional to its input reference clock, and thus the higher clock frequency is required, which means higher dynamic power consumption and noise interference may be incurred.
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Triangle Carrier-Based DPWM for Three-Level NPC Inverters [PDF]
IEEE Journal of Emerging and Selected Topics in Power Electronics, 2018 This paper proposes a triangle carrier-based discontinuous pulsewidth modulation (TCB-DPWM) implement method for three-level neutral-point-clamped (3L-NPC) inverters.
Josep Guerrero, Juan C. Vasquez, Kai Li
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Reduction of Motor Acoustic Noise with Rampwise DPWM
2020 23rd International Conference on Electrical Machines and Systems (ICEMS), 2020The discontinuous PWM method is widely used because the switching loss can be drastically reduced. However, acoustic noise generated from a motor and a reactor with the discontinuous PWM method increases more than with the conventional sinusoidal PWM method.
Hideki Ayano +4 more
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2023
Unlike continuous PWM techniques, Discontinuous PWM (DPWM) minimizes semiconductor switching losses and elevates overall system efficiency by introducing intentional breaks in the modulation process. This technical note details the operating principles and implementation of DPWM methods, which function by injecting a zero-sequence common-mode voltage ...
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Unlike continuous PWM techniques, Discontinuous PWM (DPWM) minimizes semiconductor switching losses and elevates overall system efficiency by introducing intentional breaks in the modulation process. This technical note details the operating principles and implementation of DPWM methods, which function by injecting a zero-sequence common-mode voltage ...
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Effects on Capacitor Lifetime of DPWM Method for Vienna Rectifier
2019 IEEE 4th International Future Energy Electronics Conference (IFEEC), 2019The effect of a capacitor on the overall system loss may not be critical, but a capacitor is an essential component in terms of overall system life. In this investigation, we analyzed the influence of the pulse width modulation method for a Vienna rectifier on the capacitor lifetime.
Il-Seob Kwon +3 more
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High Speed DPWM for Digital Power Converter Controller
2019 42nd International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO), 2019This study proposes a new architecture of digital pulse width modulator (DPWM) for power converter with digital control loop. The described architecture is based on a new counter-based concept. The new approach requires two counter loops: a slow big one and a fast small one.
Y. Smirnov +3 more
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Implementation of the ISPWM-DPWM-S2 technique on a microcontroller
International Symposium on Signals, Circuits and Systems ISSCS2013, 2013In this paper, we implemented on a microcontroller a modified-wave reference signal (DPWM-S2) modulated by an Inverted Sine Pulse Width Modulation (ISPWM). The microcontroller commands a three-phase asynchronous motor by means of a three-phase inverter.
C. Aghion +3 more
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Hybrid DPWM with Digital Delay-Locked Loop
2006 IEEE Workshops on Computers in Power Electronics, 2006This paper introduces a fully synthesizable hybrid digital pulse width modulator (DPWM). The DPWM includes a digital delay locked loop around a delay-line with discretely programmable delay cells to achieve constant-frequency clocked operation with the best possible resolution over a range of process or temperature variations.
Vahid Yousefzadeh +2 more
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Low-Power Counter-Based Delay Line Design For DPWM
2019 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW), 2019An efficient low-power counter-based digital pulse width modulation (DPWM) is presented. The architecture design has a bi-direction counter, delay cells and multiplexers. If the delay cells are unselected, they will be gated the clock input to stop their operations.
Cheng-Jie Yang +4 more
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Hybrid DPWM implementation using coarse and fine programmable ADLL
Microelectronics Journal, 2014abstract In the paper we propose a novel architecture and implementation of 11-bit Digital Pulse WidthModulator (DPWM) circuit based on previously known building blocks. Linearized Class-AD Double-sided (LADD) algorithm has been used to calculate the DPWM signals of the 11-bit resolution hybridDPWM for a Class-AD digital audio ampliļ¬er.
Jacek Jasielski +3 more
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