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Design and implementation of a 9-bit 8MHz DPWM with AMI06 process
2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition, 2009This paper presents one solution to a question what is the maximum switching frequency of a hybrid digital pulse width modulator (DPWM) if semiconductor process is given and resolution bit number is set high. This paper also proposes a hybrid DPWM structure where voltage controlled oscillator (VCO) and delay line are separated so as to enhance design ...
Xiaopeng Wang +3 more
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A Low-Dropout Regulator With Tail Current Control for DPWM Clock Correction
IEEE Transactions on Circuits and Systems II: Express Briefs, 2012A low-dropout (LDO) regulator with tail current control (TCC) is presented. The TCC consists of a dual differential pair, a 5-bit current digital-to-analog converter, and a current summation circuit. The TCC adjusts the tail current ratio of the dual differential pair of the LDO regulator to achieve a programmable output voltage using 5-bit digital ...
Jia-Hui Wang +2 more
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High-resolution DPWM generator for digitally controlled DC-DC converters
APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems, 2008This paper describes a new architecture for high-resolution digital PWM (DPWM) generator used in digitally-controlled DC-DC converters, PWM time resolution is determined by the difference between two (or more) gate delays, while that of conventional DPWM circuits is determined by gate delay itself.
Ibuki Mori +8 more
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FPGA implementation of KNN Algorithm-Based Prediction for DPWM Methods
Tuijin Jishu/Journal of Propulsion Technology, 2023This paper presents the prediction of the DPWM methods using the FPGA device. For the sake of prediction, the parameters such as Clocking frequency, switching frequency, positive duty cycle value, and negative duty cycle value are considered by taking 23 samples of the real-time results obtained for the DPWM techniques.
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L-filter Design of Vienna Rectifier with DPWM Method
The transactions of The Korean Institute of Electrical Engineers, 2022Su-hyeon Kim +2 more
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Resolution extension of counter-based DPWM using self-triggered method
2015 IEEE International Conference on Consumer Electronics - Taiwan, 2015The DPWM device is an important component in many industrial applications, such as motors, robots, DC/DC converters, and so on. However, the counter-based DPWM intends to extend its resolution, and thus the higher clock frequency is required. In this paper, by a cyclic self-trigger of monostable multivibrator, the proposed DPWM device can extend its ...
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Sampling-Induced Border Collision Bifurcation in a Voltage-Mode DPWM Synchronous Buck Converter
IEEE Transactions on Circuits and Systems II: Express Briefs, 2019The output voltage of a voltage-mode digitally pulse-width-modulated (DPWM) dc–dc converter is sampled once per switching cycle, and past studies show the existence of limit cycle oscillations due to quantization. This brief reports that the map of a continuous conduction mode (CCM) buck converter under DPWM is shown to be discontinuous and exhibits ...
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A 99.6 % Duty Cycle High-Resolution DPWM Using Reconfiguring Decoder
2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), 2023Venkata Naveen Kolakaluri +2 more
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A High‐Precision and Wide‐Range DPFM/DPWM Generation Method Using FPGA
International Journal of Circuit Theory and ApplicationsABSTRACTCurrent digital pulse width modulation (DPWM) implementations prioritize high‐precision duty cycle control, but they suffer from relatively lower frequency adjustment precision, which is inadequate for applications requiring high frequency resolution, such as RF Class‐D power amplifiers.
Fuchao Lu, Zheng-quan Zhang
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A Hybrid Carrier-Based DPWM With Controllable NP Voltage for Three-Phase Vienna Rectifiers
IEEE Transactions on Transportation Electrification, 2022Li Zhang, Yuhang Zou, Yan Xing
exaly